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1298 Commits

Author SHA1 Message Date
Ryan
100fc2e7d4 samd: added command to toggle srst pin when not used 2019-02-11 16:15:03 -08:00
Jason Kotzin
880e977fb6 samd: custom serial string for easy opening on mac 2019-02-09 13:48:04 -08:00
Ryan
3a9b0eee7a samd: added tpwr support 2019-02-04 18:19:28 -08:00
Uwe Bonnes
a6b75bb4ef Makefile: Add -Wnocast-function-type for compilation on gcc8. 
Older GCC versions do not warn for disabled warnings they do not know yet.
This is needed to compile with gcc8.
 2019-01-16 23:17:17 +01:00
Richard Meadows
0b28232f72 [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI (#402) 
* [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI

Silabs are using some additional OUIs we don't know about. Reported in issue #389
These should use a DI version 1 layout, so assume version 1 layout for OUIs we don't
know. However do print a notice about this on DEBUG() as suggested by @UweBonnes

The IDCODE value is sufficient to make a positive identification of an EFM32 device.
See AN0062 Section 2.2. Therefore accepting any OUI is reasonable behaviour.
Additionally the part familiy is checked, and the target rejected if not in the
`efm32_devices` table. This commit makes that rejection explicit, although it does
not change the logical behaviour here.

Note that the important registers (part number, part family, flash size) are at the
same addresses in both layouts anyhow. Currently only `efm32_cmd_serial` and
`efm32_cmd_efm_info` functions use registers that differ between DI versions.

* [efm32] tidy format warning about portability UB

* [efm32] Simplify OUI checking

* Only read the OUI once
* Accept the device even if the OU is unknown, as silabs have been using
  a variety of OUIs
* Perform fewer register reads before checking the device family is valid
 2019-01-16 09:58:59 +13:00
Uwe Bonnes
7cc02867ae stm32f4: Fix problems with small flash sizes creating overflow or empty regions. 
Thanks to "DerMeisteRR" for pointing out.
 2019-01-09 12:23:49 +01:00
Uwe Bonnes
47fad2bf7f Add Stm32L41x. 2019-01-09 12:23:49 +01:00
Uwe Bonnes
f0c6e2bbd2 Add STM32G07x. 2019-01-09 12:23:49 +01:00
Uwe Bonnes
0793dac2cf libftdi: Allow to compile with mingw and cygwin and use recent libftdi1. 
Tested with x86_64-w64-mingw32-gcc-8.2.0 and cygwin gcc (GCC) 7.3.0.
Use libftdi1 unconditionally.
Try to convice github travis to use libftdi1.
Remove unportable "uint ". Thanks to jacereda for pointing out in #400.
 2019-01-07 15:31:57 +01:00
Ingmar Jager
3f0c9ccee1 Fix support for LPC1115 and LPC1115XL devices (#415) 
* Add support for LPC11U3X devices.

The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.

* Fix support for LPC1115 and LPC1115XL devices

* Fix whitespace
 2019-01-07 13:34:00 +13:00
Josh Robson Chase
02b9d5f1ac Add delay to cortexm_reset 2019-01-07 13:32:17 +13:00
Josh Robson Chase
d7e2923990 Debug on stm32f1_flash_erase errors 2019-01-07 13:32:17 +13:00
Uwe Bonnes
525b90d4e5 cortexm: Only force halt before probe() if probe was forced. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
6df793dbf0 Revert "Allow to specificy if SRST is asserted and when it is released." 
This reverts commit 44fc24e0e747293fa05b62ed7439501553829b0b.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
da75acf015 adiv5: Only force cortexm_probe() once. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
9ce05ae67b stm32h7/f7: Store DBGMCU_CR on attach() and restore on detach(). 
On STM32[FH]7, DBG_SLEEP must be set for debugging.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
489f24584b adiv5: Read TARGETID on DPv2 devices. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
8d6092b73f cortexm_forced_halt: Only release SRST after "Halt on reset" command. 
This should make life easier if program remaps JTAG/SWD pins so that
with program running, JTAG/SWD access is impossible.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
cde7726b87 cortexm: detach still needs extra cycles. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
3ebf049424 cortexm: Only force halt before probe if idcode is unknown and ROM TABLE unreadable. 2019-01-07 13:22:01 +13:00
Uwe Bonnes
6633f74d95 stm32h7/f7: Write DBGMCU_CR only on attach. 
Split probe/attach for STM32H7.
 2019-01-07 13:22:01 +13:00
Uwe Bonnes
8575d3e7a6 stm32f7/h7: Use the DPv2 provided idcode for MCU identification. 2019-01-07 13:22:01 +13:00
Jason Kotzin
6baf90ac4c samd: adding dfu bootloader, compile support, and combined image 2018-12-20 13:35:45 -08:00
Ryan
77064754ad samd: fixed first-scan failure 2018-10-17 15:08:08 -07:00
Ryan
92ed79e68e samd: button code updated for libopencm3 2018-10-04 14:24:18 -07:00
Ingmar Jager
14bedcc441 Add support for LPC11U3X devices. 
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
 2018-10-04 08:53:05 -07:00
Ryan
b91a975d56 samd: button must hold for 5 seconds now 2018-10-03 16:04:32 -07:00
Benjamin Vernoux
771d81a5f0 Fix link for windows_dfu_util 2018-10-03 15:20:09 -07:00
Uwe Bonnes
d8b01ff61f swlink: Enable UART2 for SWO. 
Stlink on STM8S-Disco needs additional wiring for SWO.
 2018-10-03 15:19:33 -07:00
Uwe Bonnes
7cafc44bd9 swlink: Allow to enable debug on second VCOM. 2018-10-03 15:19:33 -07:00
Uwe Bonnes
0d246fb31a swlink: Measure voltage on VDD pin of Stlink/Stm8s. 2018-10-03 15:19:33 -07:00
Uwe Bonnes
184ef991bf swlink: Handle LED. 2018-10-03 15:19:33 -07:00
Uwe Bonnes
06272e0a59 swlink: Implement dfu_upgrade. 2018-10-03 15:19:33 -07:00
Uwe Bonnes
530d1e5c28 swlink: Handle force boot on bluepill. 2018-10-03 15:19:33 -07:00
Uwe Bonnes
b744d8b0c9 swlink: Implement NRST. 2018-10-03 15:19:33 -07:00
Uwe Bonnes
1263d185a6 swlink: Distinguish between Stlink on STM8-Disco and "blue pill". 2018-10-03 15:19:33 -07:00
Ryan
84b6818982 samd: convert_tdio command cleaned up 2018-09-28 14:54:31 -07:00
Ryan
4aee9fe2a3 samd: enter_bootldr command, bootldr button 2018-09-28 14:37:33 -07:00
Mark Rages
91dd879dac Another nRF52 ID. 2018-09-13 16:18:29 -06:00
Gareth McMullin
3a598a0cf3
Merge pull request #384 from rikvdh/feature/readable-reset-stlink 
Change the ST-Link SRST reset function
 2018-09-07 08:13:48 +12:00
Uwe Bonnes
f5cf6d4497 adiv5_swdp: Add extra idle cycles with write transactions. 
These extra cycles are needed by some CPU, e.g. STM32L0x1 to cross the SWCLK
/HCLK domains. Revert insufficient #373 also tackling that problem.

Thanks to Thorsten von Eicken for pointing out.
 2018-09-06 17:29:20 +02:00
Ryan
4847e0d1e6 samd: uart ports updated for bm-sam hw 2018-09-05 15:52:04 -07:00
Ryan
a599b989cf samd: TDI/O conversion, usart line coding 2018-09-05 12:10:43 -07:00
Rik van der Heijden
95053b3b4e Change the ST-Link SRST function to use libopencm3 helper functions and fix waiting for the pin-state, change init to use the SRST function for reset de-assertion 2018-09-05 20:28:02 +02:00
Rik van der Heijden
f39701c4c8 Move the LPC17xx probe function down since it performs an IAP call which can hang when performed on other devices than a LPC17xx 2018-09-05 17:40:02 +02:00
Ryan
50658a5c0a samd: small fixes to uart 2018-08-27 16:22:48 -07:00
Ryan
f828fc1ac1 samd voltage detection and line coding 2018-08-07 14:32:00 -07:00
Jason Kotzin
bd71ca2a3c Minor updates to help with speed, temporarily disabling uart 2018-08-01 19:10:01 -07:00
Ryan
2d38c9614e fixed typo in jeff/platform.h 2018-08-01 16:22:03 -07:00
Jason Kotzin
7ce265f2cf Adding queue.h file and fixing some compile errors 2018-08-01 14:26:31 -07:00