2 Commits

Author	SHA1	Message	Date
Karl Palsson	af3389652c	stm32: timers: Fix edge polarity setup ... The CCxP/CCxNP bits are actually separated by a reserved bit, so the correct mask is 0xa, (0b1010) not 0x6 (0b0110) Reported by PyroDevil on the mailinglist	2014-07-15 13:28:02 +00:00
Piotr Esden-Tempski	7085867db6	[STM32F3] Split timer common f24 into f234 and f24.	2013-07-07 16:01:52 -07:00