6 Commits

Author SHA1 Message Date
Guillaume Revaillot
55121126c3 stm32g0: add exti.
Regular exti, with enhanced EXTI_[FR]PR regs instead of EXTIR_PR.
2019-05-21 00:05:22 +00:00
Guillaume Revaillot
afd2db3097 stm32g0: add rcc. 2019-05-21 00:05:22 +00:00
Guillaume Revaillot
cbe5425090 stm32g0: add flash.
here, it's a bit of a mess.. G0 flash controller does not really
match exsting feature split. IE it has instruction cache only ..
so, no flash_idcache.c as it. flash_common_f could be used, but
flash_unlock would not take care of option byte ?

prefetch, icache and lock is ok. I had no look at flash programming
or erase yet..
2019-05-21 00:05:22 +00:00
Guillaume Revaillot
f13a9eee5b stm32g0: add power.
neither v1 nor v2...
2019-05-20 23:59:42 +00:00
Guillaume Revaillot
c49937a09c stm32g0: add gpio.
regular peripheral.
2019-05-20 23:43:46 +00:00
Guillaume Revaillot
b8d4b03722 stm32g0: add base, irqs, memorymap and current devices. 2019-05-20 23:43:41 +00:00