{ "irqs": [ "wwdg", "pvd", "rtc_tamp_css", "rtc_wkup", "flash", "rcc", "exti0", "exti1", "exti2", "exti3", "exti4", "dma1_channel1", "dma1_channel2", "dma1_channel3", "dma1_channel4", "dma1_channel5", "dma1_channel6", "dma1_channel7", "adc12", "usb_hp", "usb_lp", "fdcan1_intr1", "fdcan1_intr0", "exti9_5", "tim1_brk_tim15", "tim1_up_tim16", "tim1_trg_tim17", "tim1_cc", "tim2", "tim3", "tim4", "i2c1_ev", "i2c1_er", "i2c2_ev", "i2c2_er", "spi1", "spi2", "usart1", "usart2", "usart3", "exti15_10", "rtc_alarm", "usb_wakeup", "tim8_brk", "tim8_up", "tim8_trg", "tim8_cc", "adc3", "fsmc", "lptim1", "tim5", "spi3", "uart4", "uart5", "tim6_dac13under", "tim7_dac24under", "dma2_channel1", "dma2_channel2", "dma2_channel3", "dma2_channel4", "dma2_channel5", "adc4", "adc5", "ucpd1", "comp123", "comp456", "comp7", "hrtim_master", "hrtim_tima", "hrtim_timb", "hrtim_timc", "hrtim_timd", "hrtim_time", "hrtim_fault", "hrtim_timf", "crs", "sai", "tim20_brk", "tim20_up", "tim20_trg", "tim20_cc", "fpu", "i2c4_ev", "i2c4_er", "spi4", "aes", "fdcan2_intr0", "fdcan2_intr1", "fdcan3_intr0", "fdcan3_intr1", "rng", "lpuart", "i2c3_ev", "i2c3_er", "dmamux_ovr", "quadspi", "dma1_channel8", "dma2_channel6", "dma2_channel7", "dma2_channel8", "cordic", "fmac" ], "partname_humanreadable": "STM32 G4 series", "partname_doxygen": "STM32G4", "includeguard": "LIBOPENCM3_STM32_G4_NVIC_H" }