140 lines
3.7 KiB
C
140 lines
3.7 KiB
C
/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2011 Black Sphere Technologies Ltd.
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* Written by Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements the platform specific functions for ST-Link
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* on the STM8S discovery and STM32F103 Minimum System Development Board, also
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* known as bluepill.
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*/
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#include "general.h"
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#include "cdcacm.h"
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#include "usbuart.h"
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#include <libopencm3/stm32/f1/rcc.h>
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#include <libopencm3/cm3/scb.h>
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#include <libopencm3/cm3/scs.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/usb/usbd.h>
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#include <libopencm3/stm32/f1/adc.h>
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static uint8_t rev;
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int platform_hwversion(void)
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{
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return rev;
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}
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void platform_init(void)
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{
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uint32_t data;
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SCS_DEMCR |= SCS_DEMCR_VC_MON_EN;
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#ifdef ENABLE_DEBUG
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void initialise_monitor_handles(void);
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initialise_monitor_handles();
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#endif
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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rev = detect_rev();
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/* Enable peripherals */
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rcc_periph_clock_enable(RCC_AFIO);
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rcc_periph_clock_enable(RCC_CRC);
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/* Unmap JTAG Pins so we can reuse as GPIO */
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data = AFIO_MAPR;
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data &= ~AFIO_MAPR_SWJ_MASK;
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data |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF;
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AFIO_MAPR = data;
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/* Setup JTAG GPIO ports */
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gpio_set_mode(TMS_PORT, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_INPUT_FLOAT, TMS_PIN);
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gpio_set_mode(TCK_PORT, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, TCK_PIN);
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gpio_set_mode(TDI_PORT, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, TDI_PIN);
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gpio_set_mode(TDO_PORT, GPIO_MODE_INPUT,
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GPIO_CNF_INPUT_FLOAT, TDO_PIN);
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switch (rev) {
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case 0:
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break;
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case 1:
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/* Enable MCO Out on PA8*/
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RCC_CFGR &= ~(0xf << 24);
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RCC_CFGR |= (RCC_CFGR_MCO_HSE << 24);
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gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO8);
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break;
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}
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platform_srst_set_val(false);
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gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, LED_IDLE_RUN);
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/* Remap TIM2 TIM2_REMAP[1]
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* TIM2_CH1_ETR -> PA15 (TDI, set as output above)
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* TIM2_CH2 -> PB3 (TDO)
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*/
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data = AFIO_MAPR;
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data &= ~AFIO_MAPR_TIM2_REMAP_FULL_REMAP;
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data |= AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP1;
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AFIO_MAPR = data;
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/* Relocate interrupt vector table here */
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extern int vector_table;
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SCB_VTOR = (uint32_t)&vector_table;
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platform_timing_init();
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cdcacm_init();
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/* Don't enable UART if we're being debugged. */
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if (!(SCS_DEMCR & SCS_DEMCR_TRCENA))
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usbuart_init();
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usbuart_init();
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}
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void platform_srst_set_val(bool assert)
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{
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/* We reuse JSRST as SRST.*/
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if (assert) {
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gpio_set_mode(JRST_PORT, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_OPENDRAIN, JRST_PIN);
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/* Wait until requested value is active.*/
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while (gpio_get(JRST_PORT, JRST_PIN))
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gpio_clear(JRST_PORT, JRST_PIN);
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} else {
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gpio_set_mode(JRST_PORT, GPIO_MODE_INPUT,
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GPIO_CNF_INPUT_PULL_UPDOWN, JRST_PIN);
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/* Wait until requested value is active.*/
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while (!gpio_get(JRST_PORT, JRST_PIN))
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gpio_set(JRST_PORT, JRST_PIN);
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}
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}
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bool platform_srst_get_val(void)
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{
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return gpio_get(JRST_PORT, JRST_PIN) == 0;
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}
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const char *platform_target_voltage(void)
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{
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return "unknown";
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}
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