c72f3d588a
All the macro arguments that are user supplied, or potentially, wrap properly in () as good practice. Probably missed one or two, and a lot of them are possibly unnecessary, but it's straightforward to just do it always. Fixes github issue #321
165 lines
5.9 KiB
C
165 lines
5.9 KiB
C
/** @defgroup i2c_defines I2C Defines
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@brief <b>Defined Constants and Types for the LPC43xx I2C</b>
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@ingroup LPC43xx_defines
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@version 1.0.0
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@author @htmlonly © @endhtmlonly 2012 Michael Ossmann <mike@ossmann.com>
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@date 10 March 2013
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 Michael Ossmann <mike@ossmann.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LPC43XX_I2C_H
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#define LPC43XX_I2C_H
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/**@{*/
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/lpc43xx/memorymap.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* I2C port base addresses (for convenience) */
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#define I2C0 I2C0_BASE
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#define I2C1 I2C1_BASE
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/* --- I2C registers ------------------------------------------------------- */
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/* I2C Control Set Register */
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#define I2C_CONSET(port) MMIO32((port) + 0x000)
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#define I2C0_CONSET I2C_CONSET(I2C0)
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#define I2C1_CONSET I2C_CONSET(I2C1)
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/* I2C Status Register */
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#define I2C_STAT(port) MMIO32((port) + 0x004)
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#define I2C0_STAT I2C_STAT(I2C0)
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#define I2C1_STAT I2C_STAT(I2C1)
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/* I2C Data Register */
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#define I2C_DAT(port) MMIO32((port) + 0x008)
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#define I2C0_DAT I2C_DAT(I2C0)
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#define I2C1_DAT I2C_DAT(I2C1)
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/* I2C Slave Address Register 0 */
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#define I2C_ADR0(port) MMIO32((port) + 0x00C)
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#define I2C0_ADR0 I2C_ADR0(I2C0)
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#define I2C1_ADR0 I2C_ADR0(I2C1)
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/* SCH Duty Cycle Register High Half Word */
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#define I2C_SCLH(port) MMIO32((port) + 0x010)
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#define I2C0_SCLH I2C_SCLH(I2C0)
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#define I2C1_SCLH I2C_SCLH(I2C1)
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/* SCL Duty Cycle Register Low Half Word */
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#define I2C_SCLL(port) MMIO32((port) + 0x014)
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#define I2C0_SCLL I2C_SCLL(I2C0)
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#define I2C1_SCLL I2C_SCLL(I2C1)
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/* I2C Control Clear Register */
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#define I2C_CONCLR(port) MMIO32((port) + 0x018)
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#define I2C0_CONCLR I2C_CONCLR(I2C0)
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#define I2C1_CONCLR I2C_CONCLR(I2C1)
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/* Monitor mode control register */
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#define I2C_MMCTRL(port) MMIO32((port) + 0x01C)
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#define I2C0_MMCTRL I2C_MMCTRL(I2C0)
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#define I2C1_MMCTRL I2C_MMCTRL(I2C1)
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/* I2C Slave Address Register 1 */
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#define I2C_ADR1(port) MMIO32((port) + 0x020)
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#define I2C0_ADR1 I2C_ADR1(I2C0)
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#define I2C1_ADR1 I2C_ADR1(I2C1)
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/* I2C Slave Address Register 2 */
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#define I2C_ADR2(port) MMIO32((port) + 0x024)
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#define I2C0_ADR2 I2C_ADR2(I2C0)
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#define I2C1_ADR2 I2C_ADR2(I2C1)
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/* I2C Slave Address Register 3 */
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#define I2C_ADR3(port) MMIO32((port) + 0x028)
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#define I2C0_ADR3 I2C_ADR3(I2C0)
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#define I2C1_ADR3 I2C_ADR3(I2C1)
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/* Data buffer register */
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#define I2C_DATA_BUFFER(port) MMIO32((port) + 0x02C)
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#define I2C0_DATA_BUFFER I2C_DATA_BUFFER(I2C0)
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#define I2C1_DATA_BUFFER I2C_DATA_BUFFER(I2C1)
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/* I2C Slave address mask register 0 */
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#define I2C_MASK0(port) MMIO32((port) + 0x030)
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#define I2C0_MASK0 I2C_MASK0(I2C0)
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#define I2C1_MASK0 I2C_MASK0(I2C1)
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/* I2C Slave address mask register 1 */
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#define I2C_MASK1(port) MMIO32((port) + 0x034)
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#define I2C0_MASK1 I2C_MASK1(I2C0)
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#define I2C1_MASK1 I2C_MASK1(I2C1)
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/* I2C Slave address mask register 2 */
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#define I2C_MASK2(port) MMIO32((port) + 0x038)
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#define I2C0_MASK2 I2C_MASK2(I2C0)
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#define I2C1_MASK2 I2C_MASK2(I2C1)
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/* I2C Slave address mask register 3 */
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#define I2C_MASK3(port) MMIO32((port) + 0x03C)
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#define I2C0_MASK3 I2C_MASK3(I2C0)
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#define I2C1_MASK3 I2C_MASK3(I2C1)
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/* --- I2Cx_CONCLR values -------------------------------------------------- */
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#define I2C_CONCLR_AAC (1 << 2) /* Assert acknowledge Clear */
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#define I2C_CONCLR_SIC (1 << 3) /* I2C interrupt Clear */
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#define I2C_CONCLR_STAC (1 << 5) /* START flag Clear */
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#define I2C_CONCLR_I2ENC (1 << 6) /* I2C interface Disable bit */
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/* --- I2Cx_CONSET values -------------------------------------------------- */
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#define I2C_CONSET_AA (1 << 2) /* Assert acknowledge flag */
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#define I2C_CONSET_SI (1 << 3) /* I2C interrupt flag */
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#define I2C_CONSET_STO (1 << 4) /* STOP flag */
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#define I2C_CONSET_STA (1 << 5) /* START flag */
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#define I2C_CONSET_I2EN (1 << 6) /* I2C interface enable */
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/* --- I2C const definitions ----------------------------------------------- */
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#define I2C_WRITE 0
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#define I2C_READ 1
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/* --- I2C function prototypes --------------------------------------------- */
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BEGIN_DECLS
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void i2c0_init(const uint16_t duty_cycle_count);
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void i2c0_tx_start(void);
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void i2c0_tx_byte(uint8_t byte);
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uint8_t i2c0_rx_byte(void);
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void i2c0_stop(void);
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END_DECLS
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/**@}*/
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#endif
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