38006c3c82
Regular rng peripheral, with one additional bit : clock error detection apparently available on l4 chips). Curiously, Clock error detection is _disabled_ when bit is set, but bit is cleared by default, so peripheral / clock error detection behaves like all other chips.. NB: RNG need proper rcc_ccicr_rngsel bits set to work, no clock is set by default. Note also that on that chip fRNGCLK must be higher than fHCLK/32
38 lines
1.3 KiB
C
38 lines
1.3 KiB
C
/* This provides unification of code over STM32 subfamilies */
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/stm32/memorymap.h>
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#if defined(STM32F2)
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# include <libopencm3/stm32/f2/rng.h>
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#elif defined(STM32F4)
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# include <libopencm3/stm32/f4/rng.h>
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#elif defined(STM32F7)
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# include <libopencm3/stm32/f7/rng.h>
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#elif defined(STM32L0)
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# include <libopencm3/stm32/l0/rng.h>
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#elif defined(STM32L4)
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# include <libopencm3/stm32/l4/rng.h>
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#elif defined(STM32G0)
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# include <libopencm3/stm32/g0/rng.h>
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#else
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# error "stm32 family not defined."
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#endif
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