Karl Palsson 2c475a38d5 stm32:l0: Correctly compile as m0+, not m0. ...

Committed to binutils back in 2012, so even though it has no real impact, it at
least does the right thing for future compilers to make better decisions.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>

2014-11-18 21:50:10 +00:00

..

common

stm32: common: fix missing SPI_I2S_BASE rename regression

2014-10-08 14:32:05 +00:00

f0

[STM32F0] Add support for timers.

2014-03-11 16:49:01 +00:00

f1

add MSC (Mass Storage Class) support

2014-07-03 18:46:55 +02:00

f2

add MSC (Mass Storage Class) support

2014-07-03 18:46:55 +02:00

f3

stm32f3: drop redundant gpio.c

2014-08-10 21:06:38 +00:00

f4

[f4] Added a 25mhz clock

2014-10-15 17:27:18 +02:00

l0

stm32:l0: Correctly compile as m0+, not m0.

2014-11-18 21:50:10 +00:00

l1

[l1-flash/eeprom] Add lock/unlock/eeprom helper routines

2014-07-14 17:54:20 +00:00

can.c

Stile fixes run, 80 char boundry.

2013-06-12 21:07:35 -07:00

desig.c

[stm32] Use correct offsets for UniqueID bits

2013-10-15 11:16:14 +00:00