2ca56f4c21
PLL configuration on the H7 is pretty involved, and takes a number of configurations to make it work. In order to make peripheral drivers a bit easier to implement, working with a soft clock tree in the rcc module which stores the clock settings for each clock as they are setup such that users can request the clock value from the RCC module for configuration. Added getter for the clock which allows the user to pass the base address of the peripheral, and get the peripheral clock value for convenience. Clock configuration is still missing values for setting up all of the kernel clocks for the peripherals, but this is in work, and there is a framework to do so. Have tested to 400MHz without issue. Peripherals that are explicitly supported are working and the clock tree values appear to follow correctly. Added LDO settings to allow setting the scaling to support high frequencies.
63 lines
2.0 KiB
C
63 lines
2.0 KiB
C
/** @defgroup syscfg_defines SYSCFG Defines
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*
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* @ingroup STM32H7xx_defines
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*
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* @brief <b>Defined Constants and Types for the STM32H7xx System Configuration controller </b>
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*
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* @version 1.0.0
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*
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* @author @htmlonly © @endhtmlonly 2019
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* Brian Viele <vielster@allocor.tech>
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_SYSCFG_H
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#define LIBOPENCM3_SYSCFG_H
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#include <libopencm3/cm3/common.h>
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/**@{*/
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/**@defgroup syscfg_registers SYSCFG Registers
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 @{*/
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#define SYSCFG_PMCR MMIO32(SYSCFG_BASE + 0x04)
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#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08)
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#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0C)
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#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10)
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#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14)
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#define SYSCFG_CFGR MMIO32(SYSCFG_BASE + 0x18)
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#define SYSCFG_CCSR MMIO32(SYSCFG_BASE + 0x20)
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#define SYSCFG_CCVR MMIO32(SYSCFG_BASE + 0x24)
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#define SYSCFG_CCCR MMIO32(SYSCFG_BASE + 0x28)
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#define SYSCFG_PWRCR MMIO32(SYSCFG_BASE + 0x2C)
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#define SYSCFG_PKGR MMIO32(SYSCFG_BASE + 0x124)
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#define SYSCFG_UR(n) MMIO32(SYSCFG_BASE + 0x300 + (4 * (n)))
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/**@}*/
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/** @defgroup syscfg_pwrcr PWRCR SYSCFG configuration register
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* @ingroup syscfg_registers
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* @{*/
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#define SYSCFG_PWRCR_ODEN BIT0
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/**@}*/
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/**@}*/
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#endif
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