670a7cd83e
Use the usart-common base plus the usart-v2 code, instead of private implementations. Less code, more common apis across targets. Of note is the trick to make F0 look like it has an APB2 bus. It's the only stm32 that doesn't have a documented APB2 bus, but still has peripherals enabled via an "APB2" register, and they match how other targets have an APB2. Simply make APB2 an alias of APB1, as it's only used for clock speed detection.
90 lines
2.3 KiB
C
90 lines
2.3 KiB
C
/** @defgroup usart_file USART
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*
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* @ingroup STM32F0xx
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*
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* @brief <b>libopencm3 STM32F0xx USART</b>
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*
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* @version 1.0.0
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*
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* @date 7 Jul 2013
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/rcc.h>
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/*---------------------------------------------------------------------------*/
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/** @brief USART Receiver DMA Enable.
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*
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* DMA is available on:
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* @li USART1 Rx DMA1 channel 3 or 5.
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* @li USART2 Rx DMA1 channel 5.
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*
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* @param usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_dma(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_DMAR;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Receiver DMA Disable.
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*
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* @param usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_dma(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_DMAR;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Transmitter DMA Enable.
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*
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* DMA is available on:
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* @li USART1 Tx DMA1 channel 2 or 4.
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* @li USART2 Tx DMA1 channel 4.
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*
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* @param usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_tx_dma(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_DMAT;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Transmitter DMA Disable.
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*
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* @param usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_tx_dma(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_DMAT;
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}
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/**@}*/
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