1) This version uses a direction control level shifters. We need to control
the direction of the TMS/SWDIO pin.
2.1) Because we want to support a large voltage range for SRST we use an
external dual MOSFET for asserting and sensing the SRST line. We have
added the hardware version 3 to be handled the same way as version 0.
Meaning using separate pins for assertion and sensing of the SRST line.
2.2) The new SRST sense circuit is inverting, thus we have dedicated
code for hardware version 3 that inverts the SRST status pin on read.
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