fenugrec 410f2dd5a1 STM32 timers: avoid RMW when clearing interrupt flags ...

All defined bits are rc_w0.

The paranoid version of this would write 0 to the reserved bits (0 is the
"reset value"), but this would require knowing which flags are valid on the
actual platform, and adding the corresponding macros.

2016-02-29 20:45:18 +00:00

..

common

STM32 timers: avoid RMW when clearing interrupt flags

2016-02-29 20:45:18 +00:00

f0

stm32l/stm32f: name space standardization [BREAKING]

2015-12-14 23:26:42 +01:00

f1

stm32f1: remove artificial limit on gpio remap mask

2016-02-28 17:53:58 +00:00

f2

stm32l/stm32f: name space standardization [BREAKING]

2015-12-14 23:26:42 +01:00

f3

stm32f3: provide correct ahb frequency

2016-02-17 09:34:35 +00:00

f4

stm32f4: provide correct AHB frequency

2016-02-17 09:34:35 +00:00

f7

cortex-m7: fix badly committed incomplete test

2016-02-16 10:12:56 +00:00

l0

stm32l/stm32f: name space standardization [BREAKING]

2015-12-14 23:26:42 +01:00

l1

stm32l1: provide correct ahb frequency

2016-02-17 09:34:35 +00:00

l4

stm32l4: add gpio support

2015-11-13 02:13:31 +00:00

can.c

Stile fixes run, 80 char boundry.

2013-06-12 21:07:35 -07:00

desig.c

[stm32] desig: high nibble to hex char first

2015-01-16 19:12:21 +01:00

st_usbfs_v1.c

usb: extract ST USB FS peripheral core. [BREAKING CHANGE]

2015-10-03 01:32:34 +00:00

st_usbfs_v2.c

usb: Add st_usbfs_v2 for f0/l0 devices

2015-10-03 02:03:58 +00:00