128 lines
3.9 KiB
C
128 lines
3.9 KiB
C
/*
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* This file is part of the libopenstm32 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopenstm32/rcc.h>
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#include <libopenstm32/flash.h>
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#include <libopenstm32/gpio.h>
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#include <libopenstm32/usart.h>
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#include <libopenstm32/timer.h>
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#include <libopenstm32/nvic.h>
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/* Set STM32 to 72 MHz. HSE 16MHz */
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void clock_setup(void)
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{
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/* enable Internal High Speed Oscillator */
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rcc_osc_on(HSI);
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rcc_wait_for_osc_ready(HSI);
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/* Select HSI as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSICLK);
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/* enable External High Speed Oscillator 16MHz */
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rcc_osc_on(HSE);
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rcc_wait_for_osc_ready(HSE);
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSECLK);
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/* set prescalers for ADC, ABP1, ABP2... make this before touching the PLL */
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rcc_set_hpre(HPRE_SYSCLK_NODIV); //prescales the AHB clock from the SYSCLK
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rcc_set_adcpre(ADCPRE_PLCK2_DIV6); //prescales the ADC from the APB2 clock; max 14MHz
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rcc_set_ppre1(PPRE1_HCLK_DIV2); //prescales the APB1 from the AHB clock; max 36MHz
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rcc_set_ppre2(PPRE2_HCLK_NODIV); //prescales the APB2 from the AHB clock; max 72MHz
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/* sysclk should run with 72MHz -> 2 Waitstates ; choose 0WS from 0-24MHz, 1WS from 24-48MHz, 2WS from 48-72MHz */
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flash_set_ws(FLASH_LATENCY_2WS);
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/* Set the PLL multiplication factor to 9. -> 16MHz (external) * 9 (multiplier) / 2 (PLLXTPRE_HSE_CLK_DIV2) = 72MHz */
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Select HSI as PLL source. */
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rcc_set_pll_source(PLLSRC_HSE_CLK);
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/* divide external frequency by 2 before entering pll (only valid/needed for HSE) */
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rcc_set_pllxtpre(PLLXTPRE_HSE_CLK_DIV2);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_PLLCLK);
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}
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void gpio_setup(void)
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{
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/* Enable GPIOB clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPBEN);
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/* Set GPIO6/7 (in GPIO port B) to 'output push-pull' for the LEDs. */
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO6);
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO7);
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}
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void nvic_setup()
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{
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/* without this the timer interrupt routine will never be called */
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nvic_enable_irq(NVIC_TIM2_IRQ);
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nvic_set_priority(NVIC_TIM2_IRQ, 1);
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}
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void tim2_isr()
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{
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/* LED2 on/off */
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gpio_toggle(GPIOB, GPIO6);
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/* clear interrrupt flag */
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TIM_SR(TIM2) &= ~TIM_SR_UIF;
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}
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int main(void)
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{
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clock_setup();
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gpio_setup();
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nvic_setup();
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gpio_clear(GPIOB, GPIO7); /* LED1 on */
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gpio_set(GPIOB, GPIO6); /* LED2 off */
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rcc_peripheral_enable_clock(&RCC_APB1ENR, TIM2EN);
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/* the goal is to let the LED2 glow for a second and then be off for a second */
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/* Set timer start value */
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TIM_CNT(TIM2) = 1;
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/* Set timer prescaler. 72MHz/1440 => 50000 counts per second */
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TIM_PSC(TIM2) = 1440;
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/* End timer value. If this value is reached an interrupt is generated */
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TIM_ARR(TIM2) = 50000;
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/* Update interrupt enable */
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TIM_DIER(TIM2) |= TIM_DIER_UIE;
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/* Start timer */
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TIM_CR1(TIM2) |= TIM_CR1_CEN;
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while(1); /* Halt. */
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return 0;
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}
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