8f251e8a9d
All #includes now explicitly use the "<libopencm3/stm32/rcc.h>" format. If you want to get rid of the "libopencm3" prefix in your local project you can add a respective -I entry in your Makefile (not recommended though). All .ld files and .a libs are installed in $(TOOLCHAIN_DIR)/lib directly (as before), but are now renamed to avoid potential conflicts now or in the future. Examples: libopencm3_lpc13xx.a libopencm3_lpc13xx.ld libopencm3_stm32.a libopencm3_stm32.ld
76 lines
2.3 KiB
C
76 lines
2.3 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_IWDG_H
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#define LIBOPENCM3_IWDG_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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/* --- IWDG registers ------------------------------------------------------ */
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/* Key Register (IWDG_KR) */
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#define IWDG_KR MMIO32(IWDG_BASE + 0x00)
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/* Prescaler register (IWDG_PR) */
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#define IWDG_PR MMIO32(IWDG_BASE + 0x04)
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/* Reload register (IWDG_RLR) */
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#define IWDG_RLR MMIO32(IWDG_BASE + 0x08)
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/* Status register (IWDG_SR) */
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#define IWDG_SR MMIO32(IWDG_BASE + 0x0C)
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/* --- IWDG_KR values ------------------------------------------------------ */
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/* KEY[15:0]: Key value */
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#define IWDG_KR_RESET 0xAAAA
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#define IWDG_KR_UNLOCK 0x5555
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#define IWDG_KR_START 0xCCCC
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/* --- IWDG_PR values ------------------------------------------------------ */
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/* PR[2:0]: Prescaler divider */
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#define IWDG_PR_LSB 0
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#define IWDG_PR_DIV4 0x0
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#define IWDG_PR_DIV8 0x1
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#define IWDG_PR_DIV16 0x2
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#define IWDG_PR_DIV32 0x3
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#define IWDG_PR_DIV64 0x4
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#define IWDG_PR_DIV128 0x5
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#define IWDG_PR_DIV256 0x6
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/* Double definition: 0x06 and 0x07 both mean DIV256 as per datasheet. */
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/* #define IWDG_PR_DIV256 0x7 */
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/* --- IWDG_RLR values ----------------------------------------------------- */
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/* RL[11:0]: Watchdog counter reload value */
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/* --- IWDG_SR values ------------------------------------------------------ */
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/* RVU: Watchdog counter reload value update */
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#define IWDG_SR_RVU (1 << 1)
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/* PVU: Watchdog prescaler value update */
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#define IWDG_SR_PVU (1 << 0)
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/* --- IWDG funtion prototypes---------------------------------------------- */
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#endif
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