86 lines
2.9 KiB
C
86 lines
2.9 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef SAM3X_UART_H
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#define SAM3X_UART_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/sam/memorymap.h>
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/* --- Universal Asynchronous Receiver Transmitter (UART) registers ------- */
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#define UART_CR MMIO32(UART_BASE + 0x0000)
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#define UART_MR MMIO32(UART_BASE + 0x0004)
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#define UART_IER MMIO32(UART_BASE + 0x0008)
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#define UART_IDR MMIO32(UART_BASE + 0x000C)
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#define UART_IMR MMIO32(UART_BASE + 0x0010)
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#define UART_SR MMIO32(UART_BASE + 0x0014)
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#define UART_RHR MMIO32(UART_BASE + 0x0018)
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#define UART_THR MMIO32(UART_BASE + 0x001C)
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#define UART_BRGR MMIO32(UART_BASE + 0x0020)
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/* 0x0024:0x003C - Reserved */
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/* 0x004C:0x00FC - Reserved */
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/* 0x0100:0x0124 - PDC Area */
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/* UART Control Register (UART_CR) */
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/* Bits [31:9] - Reserved */
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#define UART_CR_RSTSTA (0x01 << 8)
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#define UART_CR_TXDIS (0x01 << 7)
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#define UART_CR_TXEN (0x01 << 6)
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#define UART_CR_RXDIS (0x01 << 5)
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#define UART_CR_RXEN (0x01 << 4)
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#define UART_CR_RSTTX (0x01 << 3)
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#define UART_CR_RSTRX (0x01 << 2)
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/* Bit [1:0] - Reserved */
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/* UART Mode Register (UART_MR) */
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/* Bits [31:16] - Reserved */
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#define UART_MR_CHMODE_MASK (0x03 << 14)
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#define UART_MR_CHMODE_NORMAL (0x00 << 14)
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#define UART_MR_CHMODE_AUTOMATIC (0x01 << 14)
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#define UART_MR_CHMODE_LOCAL_LOOPBACK (0x02 << 14)
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#define UART_MR_CHMODE_REMOTE_LOOPBACK (0x03 << 14)
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/* Bits [13:12] - Reserved */
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#define UART_MR_PAR_MASK (0x07 << 9)
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#define UART_MR_PAR_EVEN (0x00 << 9)
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#define UART_MR_PAR_ODD (0x01 << 9)
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#define UART_MR_PAR_SPACE (0x02 << 9)
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#define UART_MR_PAR_MARK (0x03 << 9)
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#define UART_MR_PAR_NO (0x04 << 9)
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/* Bits [8:0] - Reserved */
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/* UART Status Register (UART_SR) */
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/* Bits [31:13] - Reserved */
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#define UART_SR_RXBUFF (0x01 << 12)
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#define UART_SR_TXBUFF (0x01 << 11)
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/* Bit [10] - Reserved */
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#define UART_SR_TXEMPTY (0x01 << 9)
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/* Bit [8] - Reserved */
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#define UART_SR_PARE (0x01 << 7)
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#define UART_SR_FRAME (0x01 << 6)
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#define UART_SR_OVRE (0x01 << 5)
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#define UART_SR_ENDTX (0x01 << 4)
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#define UART_SR_ENDRX (0x01 << 3)
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/* Bit [2] - Reserved */
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#define UART_SR_TXRDY (0x01 << 1)
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#define UART_SR_RXRDY (0x01 << 0)
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#endif
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