3c6e9fd56d
So that the navigation pane works correctly in browsers. Some additional doc fixes put in where found (but many more still to go). Added some dummy .c and .h files to bring the associated docs into line. makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
128 lines
4.8 KiB
C
128 lines
4.8 KiB
C
/** @defgroup comp_defines COMP Defines
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*
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* @brief <b>libopencm3 Defined Constants and Types for the STM32F0xx
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* Comparator module</b>
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*
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* @ingroup STM32F0xx_defines
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*
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* @version 1.0.0
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*
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* @date 29 Jun 2013
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*
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*LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_COMP_H
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#define LIBOPENCM3_COMP_H
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/**@{*/
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/stm32/memorymap.h>
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/*****************************************************************************/
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/* Module definitions */
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/*****************************************************************************/
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#define COMP1 0
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#define COMP2 1
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/*****************************************************************************/
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/* Register definitions */
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/*****************************************************************************/
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#define COMP_CSR(i) MMIO16(SYSCFG_COMP_BASE + 0x1c + (i)*2)
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#define COMP_CSR1 COMP_CSR(COMP1)
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#define COMP_CSR2 COMP_CSR(COMP2)
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/*****************************************************************************/
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/* Register values */
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/*****************************************************************************/
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/* COMP_CSR Values ----------------------------------------------------------*/
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#define COMP_CSR_LOCK (1 << 15)
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#define COMP_CSR_OUT (1 << 14)
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#define COMP_CSR_HYST_SHIFT 12
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#define COMP_CSR_HYST (3 << COMP_CSR_HYST_SHIFT)
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#define COMP_CSR_HYST_NO (0 << COMP_CSR_HYST_SHIFT)
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#define COMP_CSR_HYST_LOW (1 << COMP_CSR_HYST_SHIFT)
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#define COMP_CSR_HYST_MED (2 << COMP_CSR_HYST_SHIFT)
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#define COMP_CSR_HYST_HIGH (3 << COMP_CSR_HYST_SHIFT)
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#define COMP_CSR_POL (1 << 11)
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#define COMP_CSR_OUTSEL_SHIFT 8
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#define COMP_CSR_OUTSEL (7 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_NONE (0 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM1_BRK (1 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM1_IC1 (2 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM1_OCRCLR (3 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM2_IC4 (4 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM2_OCRCLR (5 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM3_IC1 (6 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_OUTSEL_TIM3_OCRCLR (7 << COMP_CSR_OUTSEL_SHIFT)
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#define COMP_CSR_WINDWEN (1 << 23)
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#define COMP_CSR_INSEL_SHIFT 4
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#define COMP_CSR_INSEL (7 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_1_4_VREFINT (0 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_2_4_VREFINT (1 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_3_4_VREFINT (2 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_4_4_VREFINT (3 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_VREFINT (3 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_INM4 (4 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_INM5 (5 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_INSEL_INM6 (6 << COMP_CSR_INSEL_SHIFT)
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#define COMP_CSR_SPEED_SHIFT 2
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#define COMP_CSR_SPEED (3 << COMP_CSR_SPEED_SHIFT)
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#define COMP_CSR_SPEED_HIGH (0 << COMP_CSR_SPEED_SHIFT)
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#define COMP_CSR_SPEED_MED (1 << COMP_CSR_SPEED_SHIFT)
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#define COMP_CSR_SPEED_LOW (2 << COMP_CSR_SPEED_SHIFT)
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#define COMP_CSR_SPEED_VERYLOW (3 << COMP_CSR_SPEED_SHIFT)
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#define COMP_CSR_SW1 (1 << 1)
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#define COMP_CSR_EN (1 << 0)
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/*****************************************************************************/
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/* API definitions */
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/*****************************************************************************/
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/*****************************************************************************/
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/* API Functions */
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/*****************************************************************************/
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BEGIN_DECLS
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void comp_enable(uint8_t id);
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void comp_disable(uint8_t id);
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void comp_select_input(uint8_t id, uint32_t input);
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void comp_select_output(uint8_t id, uint32_t output);
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void comp_select_hyst(uint8_t id, uint32_t hyst);
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void comp_select_speed(uint8_t id, uint32_t speed);
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END_DECLS
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/**@}*/
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#endif
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