670a7cd83e
Use the usart-common base plus the usart-v2 code, instead of private implementations. Less code, more common apis across targets. Of note is the trick to make F0 look like it has an APB2 bus. It's the only stm32 that doesn't have a documented APB2 bus, but still has peripherals enabled via an "APB2" register, and they match how other targets have an APB2. Simply make APB2 an alias of APB1, as it's only used for clock speed detection.
98 lines
3.4 KiB
C
98 lines
3.4 KiB
C
/** @defgroup usart_defines USART Defines
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*
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* @brief <b>Defined Constants and Types for the STM32F0xx USART</b>
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*
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* @ingroup STM32F0xx_defines
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*
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* @version 1.0.0
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*
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* @date 2 July 2013
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_USART_H
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#define LIBOPENCM3_USART_H
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#include <libopencm3/stm32/common/usart_common_all.h>
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#include <libopencm3/stm32/common/usart_common_v2.h>
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/*****************************************************************************/
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/* Module definitions */
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/*****************************************************************************/
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#define USART1 USART1_BASE
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#define USART2 USART2_BASE
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#define USART3 USART3_BASE
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#define USART4 USART4_BASE
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/*****************************************************************************/
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/* Register values */
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/*****************************************************************************/
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/* USART_CR1 Values ---------------------------------------------------------*/
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#define USART_CR1_DEAT_SHIFT 21
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#define USART_CR1_DEAT (0x1F << USART_CR1_DEAT_SHIFT)
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#define USART_CR1_DEAT_VAL(x) ((x) << USART_CR1_DEAT_SHIFT)
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#define USART_CR1_DEDT_SHIFT 16
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#define USART_CR1_DEDT (0x1F << USART_CR1_DEDT_SHIFT)
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#define USART_CR1_DEDT_VAL(x) ((x) << USART_CR1_DEDT_SHIFT)
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/* USART_CR2 Values ---------------------------------------------------------*/
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#define USART_CR2_ADD_SHIFT 24
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#define USART_CR2_ADD (0xFF << USART_CR2_ADD_SHIFT)
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#define USART_CR2_ADD_VAL(x) ((x) << USART_CR2_ADD_SHIFT)
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#define USART_CR2_ABRMOD_SHIFT 21
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#define USART_CR2_ABRMOD (3 << USART_CR2_ABRMOD_SHIFT)
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#define USART_CR2_ABRMOD_STARTBIT (0 << USART_CR2_ABRMOD_SHIFT)
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#define USART_CR2_ABRMOD_FALLTOFALL (1 << USART_CR2_ABRMOD_SHIFT)
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/* USART_CR3 Values ---------------------------------------------------------*/
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#define USART_CR3_SCARCNT_SHIFT 17
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#define USART_CR3_SCARCNT (7 << USART_CR3_SCARCNT_SHIFT)
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#define USART_CR3_SCARCNT_DISABLE (0 << USART_CR3_SCARCNT_SHIFT)
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#define USART_CR3_SCARCNT_VAL(x) ((x) << USART_CR3_SCARCNT_SHIFT)
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/* USART_GTPR Values --------------------------------------------------------*/
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#define USART_GTPR_GT_SHIFT 8
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#define USART_GTPR_GT (0xFF << USART_GTPR_GT_SHIFT)
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#define USART_GTPR_GT_VAL(x) ((x) << USART_GTPR_GT_SHIFT)
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#define USART_GTPR_PSC_SHIFT 0
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#define USART_GTPR_PSC (0xFF << USART_GTPR_PSC_SHIFT)
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#define USART_GTPR_PSC_VAL(x) ((x) << USART_GTPR_PSC_SHIFT)
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/*****************************************************************************/
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/* API Functions */
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/*****************************************************************************/
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BEGIN_DECLS
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END_DECLS
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#endif
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