Henning W f974861cba cm3: SCB on M0/M0+ has SHCSR and DFSR regs too ...

SHCSR and DFSR are only implement on ARMv6 if the "Debug extension" is
implemented, but that's pretty much everywhere, so allow access to the
defines.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>

2016-12-17 01:01:40 +00:00

..

assert.h

First coarse run to fix coding style in locm3.

2013-06-12 18:22:56 -07:00

common.h

include/libopencm3/cm3/common.h: Fix CRLF.

2014-02-18 01:44:28 +01:00

cortex.h

minor stylecheck cleanups

2016-02-29 21:30:31 +00:00

doc-cm3.h

Setup to document entire project using doxygen.

2012-09-15 12:51:46 +09:30

dwt.h

[CM3] Add register definitions for Debug Watch Trace point.

2014-01-02 21:25:26 +01:00

fpb.h

cm3/fpb: Fix overly strict ARMv7 check

2016-11-05 13:54:09 -07:00

itm.h

Surround all macro parameters with ()

2015-10-14 22:15:15 +00:00

memorymap.h

cm3: MPU is optional on both v6m and v7m.

2015-08-16 13:35:35 +00:00

mpu.h

Fix misspellings using codespell tool

2016-03-08 08:52:54 -08:00

nvic.h

Remove WEAK from handler prototypes

2015-11-24 09:55:27 +00:00

scb.h

cm3: SCB on M0/M0+ has SHCSR and DFSR regs too

2016-12-17 01:01:40 +00:00

scs.h

Surround all macro parameters with ()

2015-10-14 22:15:15 +00:00

sync.h

[cm3/sync] Add mutex_trylock()

2014-12-11 09:58:34 +00:00

systick.h

Add method to clear the systick value, that is undefined at startup.

2014-01-15 22:37:45 +01:00

tpiu.h

[swo] Add/Update definitions necessary for SWO to work

2013-11-21 16:21:38 +00:00

vector.h

[Cortex] Add preliminary support for core-dependent defines ARMv6m / ARMv7m, ARMv7em

2013-08-22 17:18:35 -07:00