Added --terse and --mailback options to the make stylecheck target. It also does continue even if it enounters a possible error. We decided on two exceptions from the linux kernel coding standard: - Empty wait while loops may end with ; on the same line. - All blocks after while, if, for have to be in brackets even if they only contain one statement. Otherwise it is easy to introduce an error. Checkpatch needs to be adapted to reflect those changes.
183 lines
7.6 KiB
C
183 lines
7.6 KiB
C
/** @defgroup gpio_defines General Purpose I/O Defines
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@brief <b>Defined Constants and Types for the LPC43xx General Purpose I/O</b>
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@ingroup LPC43xx_defines
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@version 1.0.0
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@author @htmlonly © @endhtmlonly 2012 Michael Ossmann <mike@ossmann.com>
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@date 10 March 2013
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2012 Michael Ossmann <mike@ossmann.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LPC43XX_GPIO_H
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#define LPC43XX_GPIO_H
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/**@{*/
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/lpc43xx/memorymap.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* GPIO port base addresses (for convenience) */
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#define GPIO0 (GPIO_PORT_BASE + 0x2000)
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#define GPIO1 (GPIO_PORT_BASE + 0x2004)
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#define GPIO2 (GPIO_PORT_BASE + 0x2008)
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#define GPIO3 (GPIO_PORT_BASE + 0x200C)
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#define GPIO4 (GPIO_PORT_BASE + 0x2010)
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#define GPIO5 (GPIO_PORT_BASE + 0x2014)
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#define GPIO6 (GPIO_PORT_BASE + 0x2018)
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#define GPIO7 (GPIO_PORT_BASE + 0x201C)
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/* GPIO number definitions (for convenience) */
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#define GPIOPIN0 (1 << 0)
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#define GPIOPIN1 (1 << 1)
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#define GPIOPIN2 (1 << 2)
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#define GPIOPIN3 (1 << 3)
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#define GPIOPIN4 (1 << 4)
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#define GPIOPIN5 (1 << 5)
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#define GPIOPIN6 (1 << 6)
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#define GPIOPIN7 (1 << 7)
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#define GPIOPIN8 (1 << 8)
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#define GPIOPIN9 (1 << 9)
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#define GPIOPIN10 (1 << 10)
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#define GPIOPIN11 (1 << 11)
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#define GPIOPIN12 (1 << 12)
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#define GPIOPIN13 (1 << 13)
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#define GPIOPIN14 (1 << 14)
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#define GPIOPIN15 (1 << 15)
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#define GPIOPIN16 (1 << 16)
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#define GPIOPIN17 (1 << 17)
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#define GPIOPIN18 (1 << 18)
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#define GPIOPIN19 (1 << 19)
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#define GPIOPIN20 (1 << 20)
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#define GPIOPIN21 (1 << 21)
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#define GPIOPIN22 (1 << 22)
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#define GPIOPIN23 (1 << 23)
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#define GPIOPIN24 (1 << 24)
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#define GPIOPIN25 (1 << 25)
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#define GPIOPIN26 (1 << 26)
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#define GPIOPIN27 (1 << 27)
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#define GPIOPIN28 (1 << 28)
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#define GPIOPIN29 (1 << 29)
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#define GPIOPIN30 (1 << 30)
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#define GPIOPIN31 (1 << 31)
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/* --- GPIO registers ------------------------------------------------------ */
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/* TODO byte/word access registers */
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/* GPIO data direction register (GPIOn_DIR) */
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#define GPIO_DIR(port) MMIO32(port + 0x00)
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#define GPIO0_DIR GPIO_DIR(GPIO0)
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#define GPIO1_DIR GPIO_DIR(GPIO1)
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#define GPIO2_DIR GPIO_DIR(GPIO2)
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#define GPIO3_DIR GPIO_DIR(GPIO3)
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#define GPIO4_DIR GPIO_DIR(GPIO4)
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#define GPIO5_DIR GPIO_DIR(GPIO5)
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#define GPIO6_DIR GPIO_DIR(GPIO6)
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#define GPIO7_DIR GPIO_DIR(GPIO7)
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/* GPIO fast mask register (GPIOn_MASK) */
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#define GPIO_MASK(port) MMIO32(port + 0x80)
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#define GPIO0_MASK GPIO_MASK(GPIO0)
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#define GPIO1_MASK GPIO_MASK(GPIO1)
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#define GPIO2_MASK GPIO_MASK(GPIO2)
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#define GPIO3_MASK GPIO_MASK(GPIO3)
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#define GPIO4_MASK GPIO_MASK(GPIO4)
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#define GPIO5_MASK GPIO_MASK(GPIO5)
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#define GPIO6_MASK GPIO_MASK(GPIO6)
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#define GPIO7_MASK GPIO_MASK(GPIO7)
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/* GPIO port pin value register (GPIOn_PIN) */
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#define GPIO_PIN(port) MMIO32(port + 0x100)
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#define GPIO0_PIN GPIO_PIN(GPIO0)
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#define GPIO1_PIN GPIO_PIN(GPIO1)
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#define GPIO2_PIN GPIO_PIN(GPIO2)
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#define GPIO3_PIN GPIO_PIN(GPIO3)
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#define GPIO4_PIN GPIO_PIN(GPIO4)
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#define GPIO5_PIN GPIO_PIN(GPIO5)
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#define GPIO6_PIN GPIO_PIN(GPIO6)
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#define GPIO7_PIN GPIO_PIN(GPIO7)
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/* GPIO port masked pin value register (GPIOn_MPIN) */
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#define GPIO_MPIN(port) MMIO32(port + 0x180)
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#define GPIO0_MPIN GPIO_MPIN(GPIO0)
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#define GPIO1_MPIN GPIO_MPIN(GPIO1)
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#define GPIO2_MPIN GPIO_MPIN(GPIO2)
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#define GPIO3_MPIN GPIO_MPIN(GPIO3)
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#define GPIO4_MPIN GPIO_MPIN(GPIO4)
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#define GPIO5_MPIN GPIO_MPIN(GPIO5)
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#define GPIO6_MPIN GPIO_MPIN(GPIO6)
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#define GPIO7_MPIN GPIO_MPIN(GPIO7)
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/* GPIO port output set register (GPIOn_SET) */
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#define GPIO_SET(port) MMIO32(port + 0x200)
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#define GPIO0_SET GPIO_SET(GPIO0)
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#define GPIO1_SET GPIO_SET(GPIO1)
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#define GPIO2_SET GPIO_SET(GPIO2)
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#define GPIO3_SET GPIO_SET(GPIO3)
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#define GPIO4_SET GPIO_SET(GPIO4)
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#define GPIO5_SET GPIO_SET(GPIO5)
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#define GPIO6_SET GPIO_SET(GPIO6)
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#define GPIO7_SET GPIO_SET(GPIO7)
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/* GPIO port output clear register (GPIOn_CLR) */
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#define GPIO_CLR(port) MMIO32(port + 0x280)
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#define GPIO0_CLR GPIO_CLR(GPIO0)
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#define GPIO1_CLR GPIO_CLR(GPIO1)
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#define GPIO2_CLR GPIO_CLR(GPIO2)
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#define GPIO3_CLR GPIO_CLR(GPIO3)
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#define GPIO4_CLR GPIO_CLR(GPIO4)
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#define GPIO5_CLR GPIO_CLR(GPIO5)
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#define GPIO6_CLR GPIO_CLR(GPIO6)
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#define GPIO7_CLR GPIO_CLR(GPIO7)
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/* GPIO port toggle register (GPIOn_NOT) */
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#define GPIO_NOT(port) MMIO32(port + 0x300)
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#define GPIO0_NOT GPIO_NOT(GPIO0)
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#define GPIO1_NOT GPIO_NOT(GPIO1)
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#define GPIO2_NOT GPIO_NOT(GPIO2)
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#define GPIO3_NOT GPIO_NOT(GPIO3)
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#define GPIO4_NOT GPIO_NOT(GPIO4)
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#define GPIO5_NOT GPIO_NOT(GPIO5)
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#define GPIO6_NOT GPIO_NOT(GPIO6)
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#define GPIO7_NOT GPIO_NOT(GPIO7)
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/* TODO interrupts */
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BEGIN_DECLS
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void gpio_set(u32 gpioport, u32 gpios);
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void gpio_clear(u32 gpioport, u32 gpios);
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void gpio_toggle(u32 gpioport, u32 gpios);
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END_DECLS
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/**@}*/
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#endif
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