7df63fcae0
Added --terse and --mailback options to the make stylecheck target. It also does continue even if it enounters a possible error. We decided on two exceptions from the linux kernel coding standard: - Empty wait while loops may end with ; on the same line. - All blocks after while, if, for have to be in brackets even if they only contain one statement. Otherwise it is easy to introduce an error. Checkpatch needs to be adapted to reflect those changes.
161 lines
5.4 KiB
C
161 lines
5.4 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* For details see:
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* PM0081 Programming manual: STM32F40xxx and STM32F41xxx Flash programming
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* September 2011, Doc ID 018520 Rev 1
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* http://goo.gl/3ylKe
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*/
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/** @cond */
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#ifdef LIBOPENCM3_FLASH_H
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/** @endcond */
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#ifndef LIBOPENCM3_FLASH_COMMON_F24_H
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#define LIBOPENCM3_FLASH_COMMON_F24_H
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#include <libopencm3/cm3/common.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCE (1 << 10)
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#define FLASH_ACR_ICE (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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#define FLASH_ACR_LATENCY_3WS 0x03
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#define FLASH_ACR_LATENCY_4WS 0x04
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#define FLASH_ACR_LATENCY_5WS 0x05
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#define FLASH_ACR_LATENCY_6WS 0x06
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#define FLASH_ACR_LATENCY_7WS 0x07
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_PGPERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_STRT (1 << 16)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_SER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_SECTOR_0 (0x00 << 3)
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#define FLASH_CR_SECTOR_1 (0x01 << 3)
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#define FLASH_CR_SECTOR_2 (0x02 << 3)
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#define FLASH_CR_SECTOR_3 (0x03 << 3)
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#define FLASH_CR_SECTOR_4 (0x04 << 3)
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#define FLASH_CR_SECTOR_5 (0x05 << 3)
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#define FLASH_CR_SECTOR_6 (0x06 << 3)
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#define FLASH_CR_SECTOR_7 (0x07 << 3)
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#define FLASH_CR_SECTOR_8 (0x08 << 3)
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#define FLASH_CR_SECTOR_9 (0x09 << 3)
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#define FLASH_CR_SECTOR_10 (0x0a << 3)
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#define FLASH_CR_SECTOR_11 (0x0b << 3)
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#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
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#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
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#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
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#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
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/* --- FLASH_OPTCR values -------------------------------------------------- */
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/* FLASH_OPTCR[27:16]: nWRP */
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/* FLASH_OBR[15:8]: RDP */
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#define FLASH_OPTCR_NRST_STDBY (1 << 7)
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#define FLASH_OPTCR_NRST_STOP (1 << 6)
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#define FLASH_OPTCR_WDG_SW (1 << 5)
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#define FLASH_OPTCR_OPTSTRT (1 << 1)
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#define FLASH_OPTCR_OPTLOCK (1 << 0)
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#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
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#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_KEYR_KEY1 ((u32)0x45670123)
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#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
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#define FLASH_OPTKEYR_KEY1 ((u32)0x08192a3b)
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#define FLASH_OPTKEYR_KEY2 ((u32)0x4c5d6e7f)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_dcache_enable(void);
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void flash_dcache_disable(void);
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void flash_icache_enable(void);
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void flash_icache_disable(void);
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void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_dcache_reset(void);
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void flash_icache_reset(void);
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void flash_set_ws(u32 ws);
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void flash_unlock(void);
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void flash_lock(void);
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void flash_clear_pgserr_flag(void);
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void flash_clear_pgperr_flag(void);
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void flash_clear_pgaerr_flag(void);
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void flash_clear_eop_flag(void);
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void flash_clear_wrperr_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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void flash_unlock_option_bytes(void);
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void flash_lock_option_bytes(void);
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void flash_erase_all_sectors(u32 program_size);
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void flash_erase_sector(u8 sector, u32 program_size);
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void flash_program_double_word(u32 address, u64 data);
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void flash_program_word(u32 address, u32 data);
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void flash_program_half_word(u32 address, u16 data);
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void flash_program_byte(u32 address, u8 data);
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void flash_program(u32 address, u8 *data, u32 len);
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void flash_wait_for_last_operation(void);
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void flash_program_option_bytes(u32 data);
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END_DECLS
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#endif
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/** @cond */
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#else
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#warning "flash_common_f24.h should not be included direcitly, only via flash.h"
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#endif
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/** @endcond */
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