7df63fcae0
Added --terse and --mailback options to the make stylecheck target. It also does continue even if it enounters a possible error. We decided on two exceptions from the linux kernel coding standard: - Empty wait while loops may end with ; on the same line. - All blocks after while, if, for have to be in brackets even if they only contain one statement. Otherwise it is easy to introduce an error. Checkpatch needs to be adapted to reflect those changes.
115 lines
2.5 KiB
C
115 lines
2.5 KiB
C
/** @defgroup i2c_file I2C
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@ingroup LPC43xx
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@brief <b>libopencm3 LPC43xx I2C</b>
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@version 1.0.0
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@author @htmlonly © @endhtmlonly 2012 Michael Ossmann <mike@ossmann.com>
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 Michael Ossmann <mike@ossmann.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* This is a very minimal I2C driver just to make sure we can get the
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* peripheral working.
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*/
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/**@{*/
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#include <libopencm3/lpc43xx/i2c.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/cgu.h>
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void i2c0_init(void)
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{
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/* enable input on SCL and SDA pins */
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SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
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/* use IRC as clock source for APB1 (including I2C0) */
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CGU_BASE_APB1_CLK = (CGU_SRC_IRC << CGU_BASE_CLK_SEL_SHIFT);
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/* FIXME assuming we're on IRC at 12 MHz */
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/* 400 kHz I2C */
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I2C0_SCLH = 15;
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I2C0_SCLL = 15;
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/* 100 kHz I2C */
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/*
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I2C0_SCLH = 60;
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I2C0_SCLL = 60;
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*/
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/* clear the control bits */
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I2C0_CONCLR = (I2C_CONCLR_AAC | I2C_CONCLR_SIC
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| I2C_CONCLR_STAC | I2C_CONCLR_I2ENC);
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/* enable I2C0 */
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I2C0_CONSET = I2C_CONSET_I2EN;
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}
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/* transmit start bit */
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void i2c0_tx_start(void)
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{
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I2C0_CONCLR = I2C_CONCLR_SIC;
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I2C0_CONSET = I2C_CONSET_STA;
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while (!(I2C0_CONSET & I2C_CONSET_SI));
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I2C0_CONCLR = I2C_CONCLR_STAC;
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}
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/* transmit data byte */
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void i2c0_tx_byte(u8 byte)
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{
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if (I2C0_CONSET & I2C_CONSET_STA) {
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I2C0_CONCLR = I2C_CONCLR_STAC;
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}
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I2C0_DAT = byte;
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I2C0_CONCLR = I2C_CONCLR_SIC;
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while (!(I2C0_CONSET & I2C_CONSET_SI));
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}
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/* receive data byte */
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u8 i2c0_rx_byte(void)
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{
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if (I2C0_CONSET & I2C_CONSET_STA) {
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I2C0_CONCLR = I2C_CONCLR_STAC;
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}
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I2C0_CONCLR = I2C_CONCLR_SIC;
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while (!(I2C0_CONSET & I2C_CONSET_SI));
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return I2C0_DAT;
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}
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/* transmit stop bit */
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void i2c0_stop(void)
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{
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if (I2C0_CONSET & I2C_CONSET_STA) {
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I2C0_CONCLR = I2C_CONCLR_STAC;
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}
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I2C0_CONSET = I2C_CONSET_STO;
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I2C0_CONCLR = I2C_CONCLR_SIC;
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}
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/**@}*/
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