Karl Palsson 8e44177a66 [stm32] SPI includes got jumbled for for DFF
DFF exists at bit 11 for f1, f2, f4 and l1, but the f0 and f3 have that bit as
CRC len and use CR2 for data size bits instead.  The merging of the F3 and F0
and attempts to put common data in common places broke the l1 code.

F3 and F0 SPI headers are still almost completely identical.
2013-11-07 21:50:48 +00:00
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