326c945b55
Create lm4f code infrastructure from the lm3s infrastructure. As far as the interrupt table is concerned, don't create an irq.yaml. Just include the LM3S nvic.h. The LM3S vector table seems to be compatible with the LM4F Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
126 lines
2.0 KiB
YAML
126 lines
2.0 KiB
YAML
# Although this says LM3S, the interrupt table applies to the LM4F as well
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# Some interrupt vectores marked as reserved in LM3S are used in LM4F, and some
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# vectors in LM3S are marked reserved for LM4F. However, the common vectors are
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# identical, and we can safely use the same interrupt table. Reserved vectors
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# will never be triggered, so having them is perfectly safe.
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includeguard: LIBOPENCM3_LM3S_NVIC_H
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partname_humanreadable: LM3S series
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partname_doxygen: LM3S
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irqs:
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0: GPIOA
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1: GPIOB
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2: GPIOC
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3: GPIOD
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4: GPIOE
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5: UART0
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6: UART1
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7: SSI0
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8: I2C0
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9: PWM0_FAULT
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10: PWM0_0
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11: PWM0_1
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12: PWM0_2
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13: QEI0
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14: ADC0SS0
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15: ADC0SS1
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16: ADC0SS2
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17: ADC0SS3
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18: WATCHDOG
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19: TIMER0A
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20: TIMER0B
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21: TIMER1A
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22: TIMER1B
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23: TIMER2A
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24: TIMER2B
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25: COMP0
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26: COMP1
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27: COMP2
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28: SYSCTL
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29: FLASH
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30: GPIOF
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31: GPIOG
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32: GPIOH
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33: UART2
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34: SSI1
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35: TIMER3A
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36: TIMER3B
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37: I2C1
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38: QEI1
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39: CAN0
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40: CAN1
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41: CAN2
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42: ETH
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43: HIBERNATE
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44: USB0
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45: PWM0_3
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46: UDMA
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47: UDMAERR
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48: ADC1SS0
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49: ADC1SS1
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50: ADC1SS2
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51: ADC1SS3
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52: I2S0
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53: EPI0
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54: GPIOJ
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55: GPIOK
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56: GPIOL
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57: SSI2
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58: SSI3
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59: UART3
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60: UART4
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61: UART5
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62: UART6
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63: UART7
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# undefined: slot 64 - 67
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68: I2C2
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69: I2C3
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70: TIMER4A
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71: TIMER4B
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# undefined: slot 72 - 91
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92: TIMER5A
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93: TIMER5B
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94: WTIMER0A
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95: WTIMER0B
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96: WTIMER1A
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97: WTIMER1B
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98: WTIMER2A
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99: WTIMER2B
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100: WTIMER3A
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101: WTIMER3B
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102: WTIMER4A
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103: WTIMER4B
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104: WTIMER5A
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105: WTIMER5B
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106: SYSEXC
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107: PECI0
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108: LPC0
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109: I2C4
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110: I2C5
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111: GPIOM
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112: GPION
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# undefined: slot 113
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114: FAN0
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# undefined: slot 115
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116: GPIOP0
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117: GPIOP1
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118: GPIOP2
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119: GPIOP3
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120: GPIOP4
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121: GPIOP5
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122: GPIOP6
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123: GPIOP7
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124: GPIOQ0
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125: GPIOQ1
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126: GPIOQ2
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127: GPIOQ3
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128: GPIOQ4
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129: GPIOQ5
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130: GPIOQ6
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131: GPIOQ7
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# undefined: slot 132 - 133
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134: PWM1_0
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135: PWM1_1
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136: PWM1_2
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137: PWM1_3
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138: PWM1_FAULT
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