62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_TIMER_F4_H
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#define LIBOPENCM3_TIMER_F4_H
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#include <libopencm3/stm32/timer.h>
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/*
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* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
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* CNT, ARR, CCR1, CCR2, CCR3, CCR4
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*/
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/* Timer 2/5 option register (TIMx_OR) */
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#define TIM_OR(tim_base) MMIO32(tim_base + 0x50)
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#define TIM2_OR TIM_OR(TIM2)
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#define TIM5_OR TIM_OR(TIM5)
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/* --- TIM2_OR values ---------------------------------------------------- */
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/* MOE: Main output enable */
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#define TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)
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#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
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#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
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#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
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#define TIM2_OR_ITR1_RMP_MASK (0x3 << 10)
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/* --- TIM5_OR values ---------------------------------------------------- */
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/* MOE: Main output enable */
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#define TIM5_OR_TI4_RMP_GPIO (0x0 << 6)
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#define TIM5_OR_TI4_RMP_LSI (0x1 << 6)
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#define TIM5_OR_TI4_RMP_LSE (0x2 << 6)
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#define TIM5_OR_TI4_RMP_RTC (0x3 << 6)
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#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void timer_set_option(u32 timer_peripheral, u32 option);
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END_DECLS
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#endif
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