62 lines
3.0 KiB
C
62 lines
3.0 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LM4F_SYSTEMCONTROL_H
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#define LM4F_SYSTEMCONTROL_H
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#include <libopencm3/cm3/common.h>
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#define SYSTEMCONTROL_DID0 MMIO32(SYSTEMCONTROL_BASE + 0x000)
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#define SYSTEMCONTROL_DID1 MMIO32(SYSTEMCONTROL_BASE + 0x004)
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#define SYSTEMCONTROL_DC0 MMIO32(SYSTEMCONTROL_BASE + 0x008)
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#define SYSTEMCONTROL_DC1 MMIO32(SYSTEMCONTROL_BASE + 0x010)
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#define SYSTEMCONTROL_DC2 MMIO32(SYSTEMCONTROL_BASE + 0x014)
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#define SYSTEMCONTROL_DC3 MMIO32(SYSTEMCONTROL_BASE + 0x018)
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#define SYSTEMCONTROL_DC4 MMIO32(SYSTEMCONTROL_BASE + 0x01C)
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#define SYSTEMCONTROL_DC5 MMIO32(SYSTEMCONTROL_BASE + 0x020)
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#define SYSTEMCONTROL_DC6 MMIO32(SYSTEMCONTROL_BASE + 0x024)
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#define SYSTEMCONTROL_DC7 MMIO32(SYSTEMCONTROL_BASE + 0x028)
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#define SYSTEMCONTROL_PBORCTL MMIO32(SYSTEMCONTROL_BASE + 0x030)
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#define SYSTEMCONTROL_LDORCTL MMIO32(SYSTEMCONTROL_BASE + 0x034)
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#define SYSTEMCONTROL_SRCR0 MMIO32(SYSTEMCONTROL_BASE + 0x040)
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#define SYSTEMCONTROL_SRCR1 MMIO32(SYSTEMCONTROL_BASE + 0x044)
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#define SYSTEMCONTROL_SRCR2 MMIO32(SYSTEMCONTROL_BASE + 0x048)
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#define SYSTEMCONTROL_RIS MMIO32(SYSTEMCONTROL_BASE + 0x050)
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#define SYSTEMCONTROL_IMC MMIO32(SYSTEMCONTROL_BASE + 0x054)
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#define SYSTEMCONTROL_MISC MMIO32(SYSTEMCONTROL_BASE + 0x058)
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#define SYSTEMCONTROL_RESC MMIO32(SYSTEMCONTROL_BASE + 0x05C)
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#define SYSTEMCONTROL_RCC MMIO32(SYSTEMCONTROL_BASE + 0x060)
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#define SYSTEMCONTROL_PLLCFG MMIO32(SYSTEMCONTROL_BASE + 0x064)
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#define SYSTEMCONTROL_GPIOHBCTL MMIO32(SYSTEMCONTROL_BASE + 0x06C)
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#define SYSTEMCONTROL_RCC2 MMIO32(SYSTEMCONTROL_BASE + 0x070)
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#define SYSTEMCONTROL_MOSCCTL MMIO32(SYSTEMCONTROL_BASE + 0x07C)
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#define SYSTEMCONTROL_RCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x100)
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#define SYSTEMCONTROL_RCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x104)
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#define SYSTEMCONTROL_RCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x108)
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#define SYSTEMCONTROL_SCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x110)
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#define SYSTEMCONTROL_SCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x114)
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#define SYSTEMCONTROL_SCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x118)
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#define SYSTEMCONTROL_DCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x120)
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#define SYSTEMCONTROL_DCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x124)
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#define SYSTEMCONTROL_DCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x128)
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#define SYSTEMCONTROL_DSLPCLKCFG MMIO32(SYSTEMCONTROL_BASE + 0x144)
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#endif
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