Onno Kortmann 02b4aec0a9 STM32F0: Fix the PLL multiplier table
The value '6' was twice in the table and all higher frequencies are
shifted. The values are now fitting the table in 'STM32F05xxx/06xxx advanced
ARM-based 32-bit MCUs', page 101.

PLL frequencies have been measured by selecting

    rcc_set_mco(RCC_CFGR_MCO_SYSCLK);

and measuring the output with an oscilloscope. 8, 16, 24, 32, 40 and 48 MHz
work fine from the HSI base.
2013-12-16 19:37:54 +00:00
..
2013-08-22 17:18:41 -07:00
2013-08-22 17:18:41 -07:00
2013-08-22 17:18:41 -07:00
2013-12-16 19:37:54 +00:00
2013-08-22 17:18:41 -07:00