2b1ddc8490
The original submitter of this squished everything into one series, and has not returned. The code mostly appears good, and review comments were followed for the most part. The project doesn't really maintain any testing or board farm for sam3/sam4 parts, so we're going to just trust our users. Reviewed-by: Karl Palsson <karlp@tweak.net.au> sam/4l: IRQ Configuration file (irq.json) sam/4l: Basic Memory Map. sam/4l: GPIO Defines. sam/4l: GPIO Functions Added everything that needed to compile the library: Makefile, Linker Script and common includes. sam/4l: SCIF function to start OSC. sam/4l: GPIO Enable/Disable and Multiplexing configuration functions. sam/4l: PLL Clock configuration. sam/4l: Peripheral clock configuration and basic USART support. sam: USART Character length configuration. sam/4l: Generic Clock configuration functions. sam/4l: Analog to Digital Converter Interface (ADCIFE) basic support.
87 lines
3.6 KiB
C
87 lines
3.6 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef SAM4L_MEMORYMAP_H
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#define SAM4L_MEMORYMAP_H
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#include <libopencm3/cm3/common.h>
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#define PERIPH_BASE (0x40000000U)
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/* --- SAM4L peripheral bridge A -------------------------------------------- */
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#define PERIPH_PBA_BASE PERIPH_BASE
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/* (PERIPH_PBA_BASE + 0x4000) RESERVED */
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#define I2SC_BASE (PERIPH_PBA_BASE + 0x04000)
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#define SPI_BASE (PERIPH_PBA_BASE + 0x08000)
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/* (PERIPH_PBA_BASE + 0x0C000) RESERVED */
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#define TC0_BASE (PERIPH_PBA_BASE + 0x10000)
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#define TC1_BASE (PERIPH_PBA_BASE + 0x14000)
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#define TWIMS0_BASE (PERIPH_PBA_BASE + 0x18000)
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#define TWIMS1_BASE (PERIPH_PBA_BASE + 0x1C000)
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/* (PERIPH_PBA_BASE + 0x20000) RESERVED */
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#define USART0_BASE (PERIPH_PBA_BASE + 0x24000)
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#define USART1_BASE (PERIPH_PBA_BASE + 0x28000
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#define USART2_BASE (PERIPH_PBA_BASE + 0x2C000)
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#define USART3_BASE (PERIPH_PBA_BASE + 0x30000)
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/* (PERIPH_PBA_BASE + 0x34000) RESERVED */
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#define ADCIFE_BASE (PERIPH_PBA_BASE + 0x38000)
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#define DACC_BASE (PERIPH_PBA_BASE + 0x3C000)
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#define ACIFC_BASE (PERIPH_PBA_BASE + 0x40000)
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/* (PERIPH_PBA_BASE + 0x44000) to (PERIPH_PBA_BASE + 0x5C000) RESERVED */
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#define GLOC_BASE (PERIPH_PBA_BASE + 0x60000)
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#define ABDACB_BASE (PERIPH_PBA_BASE + 0x64000)
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#define TRNG_BASE (PERIPH_PBA_BASE + 0x68000)
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#define PARC_BASE (PERIPH_PBA_BASE + 0x6C000)
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#define CATB_BASE (PERIPH_PBA_BASE + 0x70000)
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/* (PERIPH_PBA_BASE + 0x74000) RESERVED */
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#define TWIM2_BASE (PERIPH_PBA_BASE + 0x78000)
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#define TWIM3_BASE (PERIPH_PBA_BASE + 0x7C000)
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#define LCDCA_BASE (PERIPH_PBA_BASE + 0x80000)
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/* --- SAM4L peripheral bridge B -------------------------------------------- */
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#define PERIPH_PBB_BASE (PERIPH_BASE + 0xA0000U)
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#define FLASHCALW_BASE (PERIPH_PBB_BASE)
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#define PICOCACHE_BASE (PERIPH_PBB_BASE + 0x400)
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#define HMATRIX_BASE (PERIPH_PBB_BASE + 0x1000)
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#define PDCA_BASE (PERIPH_PBB_BASE + 0x2000)
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#define SMAP_BASE (PERIPH_PBB_BASE + 0x3000)
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#define CRCCU_BASE (PERIPH_PBB_BASE + 0x4000)
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#define USBC_BASE (PERIPH_PBB_BASE + 0x5000)
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#define PEVC_BASE (PERIPH_PBB_BASE + 0x6000)
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/* --------- Advanced Encryption Standard (AESA) ------------- */
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#define AESA_BASE (PERIPH_BASE + 0xB0000)
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/* --- SAM4L peripheral bridge C -------------------------------------------- */
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#define PERIPH_PBC_BASE (PERIPH_BASE + 0xE0000)
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#define PM_BASE (PERIPH_PBC_BASE)
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#define CHIPID_BASE (PERIPH_PBC_BASE + 0x740)
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#define SCIF_BASE (PERIPH_PBC_BASE + 0x800)
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#define FREQM_BASE (PERIPH_PBC_BASE + 0xC00)
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#define GPIO_BASE (PERIPH_PBC_BASE + 0x1000)
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/* --- SAM4L peripheral bridge D -------------------------------------------- */
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#define PERIPH_PBD_BASE (PERIPH_BASE + 0xF0000U)
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#define BPM_BASE (PERIPH_PBD_BASE)
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#define BSCIF_BASE (PERIPH_PBD_BASE + 0x400)
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#define AST_BASE (PERIPH_PBD_BASE + 0x800)
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#define WDT_BASE (PERIPH_PBD_BASE + 0xC00)
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#define EIC_BASE (PERIPH_PBD_BASE + 0x1000)
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#define PICOUART_BASE (PERIPH_PBD_BASE + 0x1400)
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#endif
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