38006c3c82
Regular rng peripheral, with one additional bit : clock error detection apparently available on l4 chips). Curiously, Clock error detection is _disabled_ when bit is set, but bit is cleared by default, so peripheral / clock error detection behaves like all other chips.. NB: RNG need proper rcc_ccicr_rngsel bits set to work, no clock is set by default. Note also that on that chip fRNGCLK must be higher than fHCLK/32
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/** @defgroup rng_defines RNG Defines
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*
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* @ingroup STM32G0xx_defines
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*
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* @brief <b>Defined Constants and Types for the STM32G0xx EXTI Control</b>
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*
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* @version 1.0.0
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*
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* LGPL License Terms @ref lgpl_license
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* */
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_RNG_H
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#define LIBOPENCM3_RNG_H
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#include <libopencm3/stm32/common/rng_common_v1.h>
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/* --- RNG_CR values ------------------------------------------------------- */
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/** Clock error detection : CED = 0 : Detection Enabled */
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#define RNG_CR_CED (1 << 5)
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#endif
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/**@}*/
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