The original submitter of this squished everything into one series, and has not returned. The code mostly appears good, and review comments were followed for the most part. The project doesn't really maintain any testing or board farm for sam3/sam4 parts, so we're going to just trust our users. Reviewed-by: Karl Palsson <karlp@tweak.net.au> sam/4l: IRQ Configuration file (irq.json) sam/4l: Basic Memory Map. sam/4l: GPIO Defines. sam/4l: GPIO Functions Added everything that needed to compile the library: Makefile, Linker Script and common includes. sam/4l: SCIF function to start OSC. sam/4l: GPIO Enable/Disable and Multiplexing configuration functions. sam/4l: PLL Clock configuration. sam/4l: Peripheral clock configuration and basic USART support. sam: USART Character length configuration. sam/4l: Generic Clock configuration functions. sam/4l: Analog to Digital Converter Interface (ADCIFE) basic support.
127 lines
3.1 KiB
C
127 lines
3.1 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/sam/usart.h>
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void usart_set_databits(uint32_t usart, int bits)
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{
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USART_MR(usart) = (USART_MR(usart) & ~USART_MR_CHRL_MASK) |
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((bits - 5) << 6);
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}
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void usart_set_stopbits(uint32_t usart, enum usart_stopbits sb)
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{
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USART_MR(usart) = (USART_MR(usart) & ~USART_MR_NBSTOP_MASK) |
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(sb << 12);
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}
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void usart_set_parity(uint32_t usart, enum usart_parity par)
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{
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USART_MR(usart) = (USART_MR(usart) & ~USART_MR_PAR_MASK) | (par << 9);
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}
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void usart_set_mode(uint32_t usart, enum usart_mode mode)
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{
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USART_CR(usart) =
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(mode & USART_MODE_RX) ? USART_CR_RXEN : USART_CR_RXDIS;
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USART_CR(usart) = (mode & USART_MODE_TX) ? USART_CR_TXEN
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: USART_CR_TXDIS;
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}
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void usart_set_flow_control(uint32_t usart, enum usart_flowcontrol fc)
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{
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USART_MR(usart) = (USART_MR(usart) & ~USART_MR_MODE_MASK) |
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(fc ? USART_MR_MODE_HW_HANDSHAKING : 0);
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}
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void usart_enable(uint32_t usart)
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{
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USART_CR(usart) = USART_CR_TXEN | USART_CR_RXEN;
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}
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void usart_disable(uint32_t usart)
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{
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USART_CR(usart) = USART_CR_TXDIS | USART_CR_RXDIS;
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}
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void usart_send(uint32_t usart, uint16_t data)
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{
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USART_THR(usart) = data;
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}
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uint16_t usart_recv(uint32_t usart)
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{
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return USART_RHR(usart) & 0x1f;
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}
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void usart_wait_send_ready(uint32_t usart)
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{
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while ((USART_CSR(usart) & USART_CSR_TXRDY) == 0);
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}
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void usart_wait_recv_ready(uint32_t usart)
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{
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while ((USART_CSR(usart) & USART_CSR_RXRDY) == 0);
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}
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void usart_send_blocking(uint32_t usart, uint16_t data)
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{
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usart_wait_send_ready(usart);
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usart_send(usart, data);
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}
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uint16_t usart_recv_blocking(uint32_t usart)
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{
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usart_wait_recv_ready(usart);
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return usart_recv(usart);
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}
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void usart_enable_rx_interrupt(uint32_t usart)
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{
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USART_IER(usart) = USART_CSR_RXRDY;
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}
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void usart_disable_rx_interrupt(uint32_t usart)
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{
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USART_IDR(usart) = USART_CSR_RXRDY;
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}
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void usart_wp_enable(uint32_t usart)
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{
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USART_WPMR(usart) = USART_WPMR_KEY | USART_WPMR_WPEN;
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}
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void usart_wp_disable(uint32_t usart)
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{
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USART_WPMR(usart) = USART_WPMR_KEY & (~USART_WPMR_WPEN);
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}
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void usart_select_clock(uint32_t usart, enum usart_clock clk)
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{
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uint32_t reg_mr = USART_MR(usart) & (~USART_MR_USCLKS_MASK);
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USART_MR(usart) = ((clk << USART_MR_USCLKS_SHIFT) & USART_MR_USCLKS_MASK) | reg_mr;
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}
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void usart_set_character_length(uint32_t usart, enum usart_chrl chrl)
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{
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uint32_t reg_mr = USART_MR(usart) & (~USART_MR_CHRL_MASK);
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USART_MR(usart) = reg_mr | (chrl << USART_MR_CHRL_SHIFT);
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}
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