GD32F1X0 (X can be 3, 5, 7 and 9) is a series of Cortex-M3 MCUs by GigaDevice, which features pin-to-pin package compatibility with STM32F030 MCU line. F150 adds USB support to F130, and F170/F190 adds CAN support. Currently the code mainly targets GD32F130 and F150 chips. Some register are different between F130/150 and F170/190, just like the difference between STM32F1 Performance line and Connectivity line. From the perspective of registers and memory map, GD32F1X0 seems like a mixture between STM32F1 and STM32F0 (because it is designed to be pin-to-pin compatible with F0, but with Cortex-M3 like F1). A bunch of code are shared between STM32 and GD32, and these code are specially processed to include the GD32 headers instead of STM32 headers when meet GD32F1X0. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Karl Palsson <karlp@tweak.net.au> gd32/rcc.[ch] are forks of stm32f1/rcc gd32/flash.[ch] are forks of stm32f0/flash No attempts at deduplicating this have been done at this stage. We can see where they move in the future.
47 lines
1.6 KiB
C
47 lines
1.6 KiB
C
/* This provides unification of code over STM32 subfamilies */
|
|
|
|
/*
|
|
* This file is part of the libopencm3 project.
|
|
*
|
|
* This library is free software: you can redistribute it and/or modify
|
|
* it under the terms of the GNU Lesser General Public License as published by
|
|
* the Free Software Foundation, either version 3 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public License
|
|
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#include <libopencm3/cm3/common.h>
|
|
#include <libopencm3/stm32/memorymap.h>
|
|
|
|
#if defined(STM32F0)
|
|
# include <libopencm3/stm32/f0/rcc.h>
|
|
#elif defined(STM32F1)
|
|
# include <libopencm3/stm32/f1/rcc.h>
|
|
#elif defined(STM32F2)
|
|
# include <libopencm3/stm32/f2/rcc.h>
|
|
#elif defined(STM32F3)
|
|
# include <libopencm3/stm32/f3/rcc.h>
|
|
#elif defined(STM32F4)
|
|
# include <libopencm3/stm32/f4/rcc.h>
|
|
#elif defined(STM32F7)
|
|
# include <libopencm3/stm32/f7/rcc.h>
|
|
#elif defined(STM32L0)
|
|
# include <libopencm3/stm32/l0/rcc.h>
|
|
#elif defined(STM32L1)
|
|
# include <libopencm3/stm32/l1/rcc.h>
|
|
#elif defined(STM32L4)
|
|
# include <libopencm3/stm32/l4/rcc.h>
|
|
#elif defined(GD32F1X0)
|
|
# include <libopencm3/gd32/f1x0/rcc.h>
|
|
#else
|
|
# error "stm32 family not defined."
|
|
#endif
|
|
|