(viz STM32F10xxx Cortex-M3 programming manual PM0056 and Cortex-M3-Generic-User-Guide.pdf) Doxygen commentary added
165 lines
4.6 KiB
C
165 lines
4.6 KiB
C
/** @file
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@ingroup STM32F
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@brief <b>libopencm3 STM32F Nested Vectored Interrupt Controller</b>
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@version 1.0.0
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@author @htmlonly © @endhtmlonly 2010 Thomas Otto <tommi@viadmin.org>
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@author @htmlonly © @endhtmlonly 2012 Fergus Noble <fergusnoble@gmail.com>
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@date 7 July 2012
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The STM32F series provides up to 68 maskable user interrupts for the STM32F10x
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series, and 87 for the STM32F2xx and STM32F4xx series.
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The NVIC registers are defined by the ARM standards
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@see Cortex-M3 Devices Generic User Guide
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2012 Fergus Noble <fergusnoble@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/nvic.h>
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Enable Interrupt
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Enables a user interrupt.
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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*/
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void nvic_enable_irq(u8 irqn)
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{
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NVIC_ISER(irqn / 32) = (1 << (irqn % 32));
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Disable Interrupt
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Disables a user interrupt.
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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*/
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void nvic_disable_irq(u8 irqn)
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{
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NVIC_ICER(irqn / 32) = (1 << (irqn % 32));
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Return Pending Interrupt
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True if the interrupt has occurred and is waiting for service.
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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@return Boolean. Interrupt pending.
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*/
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u8 nvic_get_pending_irq(u8 irqn)
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{
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return NVIC_ISPR(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0;
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Set Pending Interrupt
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Force a user interrupt to a pending state. No effect if the interrupt is already
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pending.
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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*/
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void nvic_set_pending_irq(u8 irqn)
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{
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NVIC_ISPR(irqn / 32) = (1 << (irqn % 32));
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Clear Pending Interrupt
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Force remove a user interrupt from a pending state. No effect if the interrupt is
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actively being serviced.
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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*/
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void nvic_clear_pending_irq(u8 irqn)
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{
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NVIC_ICPR(irqn / 32) = (1 << (irqn % 32));
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Return Active Interrupt
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Interrupt has occurred and is currently being serviced.
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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@return Boolean. Interrupt active.
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*/
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u8 nvic_get_active_irq(u8 irqn)
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{
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return NVIC_IABR(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0;
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Return Enabled Interrupt
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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@return Boolean. Interrupt enabled.
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*/
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u8 nvic_get_irq_enabled(u8 irqn)
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{
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return NVIC_ISER(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0;
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Set Interrupt Priority
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@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint
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@param[in] priority Unsigned int8. Interrupt priority (0 ... 255)
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*/
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void nvic_set_priority(u8 irqn, u8 priority)
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{
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NVIC_IPR(irqn / 4) = ((priority << ((irqn % 4) * 8));
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}
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/*-----------------------------------------------------------------------------*/
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/** @brief NVIC Software Trigger Interrupt
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Generate an interrupt from software. This has no effect for unprivileged access
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unless the privilege level has been elevated through the System Control Registers.
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@param[in] sgin Unsigned int16. Interrupt number (0 ... 239)
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*/
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void nvic_generate_software_interrupt(u16 irqn)
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{
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if (irqn <= 239)
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NVIC_STIR |= irqn;
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}
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