106 lines
3.4 KiB
C
106 lines
3.4 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 chrysn <chrysn@fsfe.org>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/** @file
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* @see EFM32TG_CMU
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*/
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/** Definitions for the CMU (Clock Management Unit).
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*
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* This corresponds to the description in d0034_efm32tg_reference_manual.pdf
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* section 11.
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*
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* @defgroup EFM32TG_CMU EFM32 Tiny Geco CMU
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* @{
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*/
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#ifndef LIBOPENCM3_EFM32_TINYGECKO_CMU_H
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#define LIBOPENCM3_EFM32_TINYGECKO_CMU_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/efm32/memorymap.h>
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/** Register definitions and register value definitions for the CMU subsystem
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*
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* @defgroup EFM32TG_CMU_regsandvals EFM32 Tiny Gecko CMU registers and values
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* @{
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*/
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/** These definitions reflect d0034_efm32tg_reference_manual.pdf section 11.4.
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*
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* @defgroup EFM32TG_CMU_registers EFM32 Tiny Gecko CMU registers
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* @{
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*/
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#define CMU_CTRL MMIO32(CMU_BASE + 0x000)
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#define CMU_HFCORECLKDIV MMIO32(CMU_BASE + 0x004)
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#define CMU_HFPERCLKDIV MMIO32(CMU_BASE + 0x008)
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#define CMU_HFRCOCTRL MMIO32(CMU_BASE + 0x00C)
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#define CMU_LFRCOCTRL MMIO32(CMU_BASE + 0x010)
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#define CMU_AUXHFRCOCTRL MMIO32(CMU_BASE + 0x014)
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#define CMU_CALCTRL MMIO32(CMU_BASE + 0x018)
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#define CMU_CALCNT MMIO32(CMU_BASE + 0x01C)
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#define CMU_OSCENCMD MMIO32(CMU_BASE + 0x020)
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#define CMU_CMD MMIO32(CMU_BASE + 0x024)
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#define CMU_LFCLKSEL MMIO32(CMU_BASE + 0x028)
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#define CMU_STATUS MMIO32(CMU_BASE + 0x02C)
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#define CMU_IF MMIO32(CMU_BASE + 0x030)
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#define CMU_IFS MMIO32(CMU_BASE + 0x034)
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#define CMU_IFC MMIO32(CMU_BASE + 0x038)
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#define CMU_IEN MMIO32(CMU_BASE + 0x03C)
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#define CMU_HFCORECLKEN0 MMIO32(CMU_BASE + 0x040)
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#define CMU_HFPERCLKEN0 MMIO32(CMU_BASE + 0x044)
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#define CMU_SYNCBUSY MMIO32(CMU_BASE + 0x050)
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#define CMU_FREEZE MMIO32(CMU_BASE + 0x054)
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#define CMU_LFACLKEN0 MMIO32(CMU_BASE + 0x058)
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#define CMU_LFBCLKEN0 MMIO32(CMU_BASE + 0x060)
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#define CMU_LFAPRESC0 MMIO32(CMU_BASE + 0x068)
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#define CMU_LFBPRESC0 MMIO32(CMU_BASE + 0x070)
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#define CMU_PCNTCTRL MMIO32(CMU_BASE + 0x078)
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#define CMU_LCDCTRL MMIO32(CMU_BASE + 0x07C)
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#define CMU_ROUTE MMIO32(CMU_BASE + 0x080)
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#define CMU_LOCK MMIO32(CMU_BASE + 0x084)
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/** @} */
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/** @} */
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/** @} */
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/**
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* This section is incomplete because i'm impatient and want a working result
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* quickly
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*
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* @todo Include all bits and bit groups from the manual.
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*/
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#define CMU_HFPERCLKEN0_GPIO (1<<6)
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#define CMU_LFCLKSEL_LFB_DISABLED (0<<2)
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#define CMU_LFCLKSEL_LFB_LFRCO (1<<2)
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#define CMU_LFCLKSEL_LFB_LFXO (2<<2)
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#define CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 (3<<2)
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#define CMU_LFCLKSEL_LFB_MASK (0x03<<2)
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#define CMU_LFCLKSEL_LFA_DISABLED 0
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#define CMU_LFCLKSEL_LFA_LFRCO 1
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#define CMU_LFCLKSEL_LFA_LFXO 2
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#define CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 3
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#define CMU_LFCLKSEL_LFA_MASK 0x03
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#endif
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