the header file genertion mechanism here is designed to: * use human readable source data that is better structured and less repetitive than the header files themselves * produce same quality header files than the manual process of writing them. some features were not yet enabled to show that the existing headers didn't change. (look at emu.h's differences. whitespace switched from tabs to spaces as they are easier to handle, use --color-words to see the few differences that stemmed from inconsistencies in the original file.) * be less tedious and thus error prone when doing large modifications (eg, i forgot to add _MASK to bitfields, would like to enable bitbanding acces, and to overhaul the naming in doxygen modules)
51 lines
1.7 KiB
YAML
51 lines
1.7 KiB
YAML
copyright: "2012 chrysn <chrysn@fsfe.org>"
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license: lgpl-3+
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shortdocname: EFM32TG_EMU
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longdocname: EFM32 Tiny Gecko EMU
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shortname: EMU
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longname: Energy Management Unit
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baseref: d0034_efm32tg_reference_manual.pdf section 10
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registers_baserefext: ".4"
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registers:
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- name: CTRL
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definition_baserefext: .5.1
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details: ", and 10.3.2 for details (especially on why EM4CTRL_TWO and _THREE are defined)."
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offset: 0x000
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fields:
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- name: EM4CTRL
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shift: 2
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length: 2
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values:
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- {name: TWO, value: 2}
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- {name: THREE, value: 3}
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- name: EM2BLOCK
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shift: 1
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doc: When this bit is set, no mode lower than EM1 will be entered
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- name: EMVREG
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shift: 0
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doc: When this bit is set, the voltage regulator will stay on in modes lower than EM1
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- name: LOCK
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definition_baserefext: .5.2
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details: ". There seems not to be another mention of it."
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offset: 0x008
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values:
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- name: IS_UNLOCKED
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value: 0
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doc: When the LOCK register reads as this value, it is open
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- name: IS_LOCKED
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value: 1
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doc: When the LOCK register reads as this value, it is locked
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- name: SET_LOCKED
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value: 0
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doc: Write this to the LOCK register to lock the EMU
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- name: SET_UNLOCKED
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value: "0xade8"
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doc: Write this to the LOCK register to unlock the EMU
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- name: AUXCTRL
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definition_baserefext: .5.3
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details: ", and 9.5.3 for details."
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offset: 0x024
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fields:
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- name: HRCCLR
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shift: 0
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