2b1ddc8490
The original submitter of this squished everything into one series, and has not returned. The code mostly appears good, and review comments were followed for the most part. The project doesn't really maintain any testing or board farm for sam3/sam4 parts, so we're going to just trust our users. Reviewed-by: Karl Palsson <karlp@tweak.net.au> sam/4l: IRQ Configuration file (irq.json) sam/4l: Basic Memory Map. sam/4l: GPIO Defines. sam/4l: GPIO Functions Added everything that needed to compile the library: Makefile, Linker Script and common includes. sam/4l: SCIF function to start OSC. sam/4l: GPIO Enable/Disable and Multiplexing configuration functions. sam/4l: PLL Clock configuration. sam/4l: Peripheral clock configuration and basic USART support. sam: USART Character length configuration. sam/4l: Generic Clock configuration functions. sam/4l: Analog to Digital Converter Interface (ADCIFE) basic support.
76 lines
2.1 KiB
C
76 lines
2.1 KiB
C
/** @addtogroup scif
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*
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* @brief <b>Access functions for the SAM4 Power Manager (PM)</b>
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* @ingroup SAM4
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* LGPL License Terms @ref lgpl_license
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* @author @htmlonly © @endhtmlonly 2016
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* Maxim Sloyko <maxims@google.com>
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*
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/sam/pm.h>
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void pm_select_main_clock(enum mck_src source_clock)
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{
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PM_UNLOCK = PM_MCCTRL_KEY;
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PM_MCCTRL = ((source_clock & PM_MCCTRL_MCSEL_MASK) << PM_MCCTRL_MCSEL_SHIFT);
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while (!(PM_SR & PM_SR_CKRDY));
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}
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void pm_enable_clock_div(enum pm_cksel sel_target, uint8_t div)
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{
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while (!(PM_SR & PM_SR_CKRDY));
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uint32_t reg = (PM_CKSEL_DIV | (div & PM_CKSEL_MASK));
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PM_UNLOCK = PM_CKSEL_KEY(sel_target);
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PM_CKSEL(sel_target) = reg;
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while (!(PM_SR & PM_SR_CKRDY));
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}
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void pm_set_divmask_clock(uint8_t mask)
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{
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PM_UNLOCK = PM_PBADIVMASK_KEY;
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PM_PBADIVMASK = mask;
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}
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static void set_peripheral_clock_status(enum pm_peripheral periph, bool on)
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{
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uint8_t reg_id = periph/32;
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uint8_t bit_offset = periph % 32;
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uint32_t reg_mask = PM_MASK(reg_id);
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if (on) {
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reg_mask |= (1 << bit_offset);
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} else {
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reg_mask &= ~(1 << bit_offset);
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}
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PM_UNLOCK = PM_MASK_KEY(reg_id);
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PM_MASK(reg_id) = reg_mask;
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}
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void pm_enable_peripheral_clock(enum pm_peripheral periph)
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{
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set_peripheral_clock_status(periph, true);
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}
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void pm_disable_peripheral_clock(enum pm_peripheral periph)
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{
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set_peripheral_clock_status(periph, false);
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}
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