Also: - Fix a few typos (e.g. s/ADC1_BSAE/ADC1_BASE/). - adc.h: Use common SUBSYSTEMNAME_REGISTERNAME_FOO #define format.
167 lines
3.4 KiB
C
167 lines
3.4 KiB
C
/*
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* This file is part of the libopenstm32 project.
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*
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* Copyright (C) 2009 Edward Cheeseman <evbuilder@users.sourceforge.net>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Basic ADC handling API.
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*
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* Examples:
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* rcc_peripheral_enable_clock(&RCC_APB2ENR, ADC1EN);
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* rcc_peripheral_disable_clock(&RCC_APB2ENR, ADC1EN);
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* rcc_peripheral_reset(&RCC_APB2RSTR, ADC1RST);
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* rcc_peripheral_clear_reset(&RCC_APB2RSTR, ADC1RST);
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*
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* rcc_set_adc_clk(ADC_PRE_PLCK2_DIV2);
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* adc_set_mode(ADC1, TODO);
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* reg16 = adc_read(ADC1, ADC_CH_0);
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*/
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#include <libopenstm32/adc.h>
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void rcc_set_adc_clk(u32 prescaler)
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{
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/* TODO */
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/* FIXME: QUICK HACK to prevent compiler warnings. */
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prescaler = prescaler;
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}
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void adc_set_mode(u32 block, /* TODO */ u8 mode)
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{
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/* TODO */
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/* FIXME: QUICK HACK to prevent compiler warnings. */
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block = block;
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mode = mode;
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}
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void adc_read(u32 block, u32 channel)
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{
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/* TODO */
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/* FIXME: QUICK HACK to prevent compiler warnings. */
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block = block;
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channel = channel;
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}
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void adc_enable_analog_watchdog_regular(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_AWDEN;
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}
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void adc_disable_analog_watchdog_regular(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_AWDEN;
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}
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void adc_enable_analog_watchdog_injected(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_JAWDEN;
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}
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void adc_disable_analog_watchdog_injected(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_JAWDEN;
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}
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void adc_enable_discontinous_mode_regular(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_DISCEN;
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}
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void adc_disable_discontinous_mode_regular(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_DISCEN;
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}
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void adc_enable_discontinous_mode_injected(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_JDISCEN;
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}
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void adc_disable_discontinous_mode_injected(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_JDISCEN;
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}
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void adc_enable_automatic_injected_group_conversion(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_JAUTO;
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}
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void adc_disable_automatic_injected_group_conversion(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_JAUTO;
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}
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void adc_enable_analog_watchdog_on_all_channels(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_AWDSGL;
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}
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void adc_enable_analog_watchdog_on_selected_channel(u32 adc, u8 channel)
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{
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u32 reg32;
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reg32 = (ADC_CR1(adc) & 0xffffffe0); /* Clear bits [4:0]. */
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if (channel < 18)
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reg32 |= channel;
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ADC_CR1(adc) = reg32;
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ADC_CR1(adc) &= ~ADC_CR1_AWDSGL;
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}
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void adc_enable_scan_mode(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_SCAN;
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}
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void adc_disable_scan_mode(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_SCAN;
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}
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void adc_enable_jeoc_interrupt(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_JEOCIE;
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}
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void adc_disable_jeoc_interrupt(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_JEOCIE;
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}
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void adc_enable_awd_interrupt(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_AWDIE;
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}
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void adc_disable_awd_interrupt(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_AWDIE;
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}
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void adc_enable_eoc_interrupt(u32 adc)
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{
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ADC_CR1(adc) |= ADC_CR1_EOCIE;
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}
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void adc_disable_eoc_interrupt(u32 adc)
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{
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ADC_CR1(adc) &= ~ADC_CR1_EOCIE;
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}
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