72 lines
2.3 KiB
C
72 lines
2.3 KiB
C
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LM4F_MEMORYMAP_H
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#define LM4F_MEMORYMAP_H
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#include <libopencm3/cm3/common.h>
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/* --- LM4F specific peripheral definitions ----------------------------- */
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#define GPIOA_APB_BASE (0x40004000U)
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#define GPIOB_APB_BASE (0x40005000U)
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#define GPIOC_APB_BASE (0x40006000U)
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#define GPIOD_APB_BASE (0x40007000U)
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#define GPIOE_APB_BASE (0x40024000U)
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#define GPIOF_APB_BASE (0x40025000U)
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#define GPIOG_APB_BASE (0x40026000U)
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#define GPIOH_APB_BASE (0x40027000U)
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#define GPIOJ_APB_BASE (0x4003D000U)
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#define GPIOA_BASE (0x40058000U)
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#define GPIOB_BASE (0x40059000U)
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#define GPIOC_BASE (0x4005A000U)
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#define GPIOD_BASE (0x4005B000U)
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#define GPIOE_BASE (0x4005C000U)
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#define GPIOF_BASE (0x4005D000U)
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#define GPIOG_BASE (0x4005E000U)
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#define GPIOH_BASE (0x4005F000U)
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#define GPIOJ_BASE (0x40060000U)
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#define GPIOK_BASE (0x40061000U)
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#define GPIOL_BASE (0x40062000U)
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#define GPIOM_BASE (0x40063000U)
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#define GPION_BASE (0x40064000U)
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#define GPIOP_BASE (0x40065000U)
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#define GPIOQ_BASE (0x40066000U)
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#define UART0_BASE (0x4000C000U)
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#define UART1_BASE (0x4000D000U)
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#define UART2_BASE (0x4000E000U)
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#define UART3_BASE (0x4000F000U)
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#define UART4_BASE (0x40010000U)
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#define UART5_BASE (0x40011000U)
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#define UART6_BASE (0x40012000U)
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#define UART7_BASE (0x40013000U)
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#define SSI0_BASE (0x40008000U)
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#define SSI1_BASE (0x40009000U)
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#define SSI2_BASE (0x4000A000U)
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#define SSI3_BASE (0x4000B000U)
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#define USB_BASE (0x40050000U)
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#define SYSCTL_BASE (0x400FE000U)
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#endif
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