JackCarterSmith
efab6c2ff3
- Removed IWDG (need to migrate to WWDG for RTC working) - Power registers to ask for next power state - Stop mode instead of complete power shutdown
87 lines
3.7 KiB
C
87 lines
3.7 KiB
C
#include "stm32f1xx_hal.h"
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#ifndef REGS_H_
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#define REGS_H_
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enum reg_id {
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REG_ID_TYP = 0x00, //!< firmware type (0=official, others=custom)
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REG_ID_VER = 0x01, //!< fw version (7:4=Major, 3:0=Minor)
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#ifdef I2C_REGS_COMPAT
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REG_ID_CFG = 0x02, // config
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REG_ID_INT = 0x03, // interrupt status
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REG_ID_KEY = 0x04, // key status
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REG_ID_BKL = 0x05, // backlight steps (0-9)
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REG_ID_DEB = 0x06, // debounce cfg
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REG_ID_FRQ = 0x07, // poll freq cfg
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REG_ID_PWR_CTRL = 0x08, // Power control (0: idle, 1: pico reset, 2: system reset, 3: reserved, 4: sleep, 5: full-shutdown)
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REG_ID_FIF = 0x09, // fifo
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REG_ID_BK2 = 0x0A, // keyboard backlight (0-9)
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REG_ID_BAT = 0x0B, // battery
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REG_ID_C64_MTX = 0x0C,// read c64 matrix
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REG_ID_C64_JS = 0x0D, // joystick io bits
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REG_ID_INT_CFG = 0x0E, // IRQ config
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REG_ID_RTC_CFG = 0x0F, // RTC general config
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REG_ID_RTC_DATE = 0x10, // RTC date
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REG_ID_RTC_TIME = 0x11, // RTC time
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REG_ID_RTC_ALARM_DATE = 0x12, // RTC alarm date
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REG_ID_RTC_ALARM_TIME = 0x13, // RTC alarm time
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#else
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REG_ID_CFG = 0x02, //!< config
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REG_ID_INT_CFG = 0x03, //!< IRQ config
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REG_ID_INT = 0x04, //!< interrupt status
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REG_ID_BKL = 0x05, //!< backlight steps (0-9)
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REG_ID_BK2 = 0x06, //!< keyboard backlight (0-9)
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REG_ID_DEB = 0x07, //!< debounce cfg (time in ms)
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REG_ID_FRQ = 0x08, //!< poll freq cfg (time in ms)
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REG_ID_PWR_CTRL = 0x09, //!< Power control (0: idle, 1: pico reset, 2: system reset, 3: reserved, 4: sleep, 5: full-shutdown)
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REG_ID_RTC_CFG = 0x0A, //!< RTC general config
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REG_ID_RTC_DATE = 0x0B, //!< RTC date
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REG_ID_RTC_TIME = 0x0C, //!< RTC time
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REG_ID_RTC_ALARM_DATE = 0x0D, //!< RTC alarm date
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REG_ID_RTC_ALARM_TIME = 0x0E, //!< RTC alarm time
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REG_ID_KEY = 0x10, //!< key status
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REG_ID_FIF = 0x11, //!< fifo
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REG_ID_C64_MTX = 0x12, //!< read c64 matrix
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REG_ID_C64_JS = 0x13, //!< joystick io bits
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REG_ID_BAT = 0x30, //!< battery
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#endif
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REG_ID_LAST
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};
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#define CFG_OVERFLOW_ON (1 << 0) //When a FIFO overflow happens, should the new entry still be pushed, overwriting the oldest one. If 0 then new entry is lost.
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#define CFG_REPORT_MODS (1 << 6) // Should Alt, Sym and Shifts be reported as well
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#define CFG_USE_MODS (1 << 7) // Should Alt, Sym and Shifts modify the keys reported
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// CFG_STICKY_MODS // Pressing and releasing a mod affects next key pressed
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#define INT_OVERFLOW (1 << 0)
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#define INT_CAPSLOCK (1 << 1)
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#define INT_NUMLOCK (1 << 2)
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#define INT_KEY (1 << 3)
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#define INT_PANIC (1 << 4)
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#define KEY_CAPSLOCK (1 << 5)
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#define KEY_NUMLOCK (1 << 6)
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#define KEY_COUNT_MASK 0x1F //0x1F == 31
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#define RTC_CFG_RUN_ALARM (1 << 0) // b0: Set the RTC alarm active.
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#define RTC_CFG_REARM (1 << 1) // b1: If set, the RTC alarm will rearm for the next day trigger (if RTC_CFG_DATE_ALARM is set, repeat every day after the target date is reached)
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#define RTC_CFG_DATE_ALARM (1 << 2) // b2: If set, check when alarm trig for the precise date, otherwise return to normal behavior (or sleep if wake-up)
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#define RTC_CFG_PBTN_ALARM_IGNORE (1 << 3) // b3: If unset, override the power button shutdown behavior to keep the STM32 "alive" for the RTC to operate.
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//#define RTC_CFG_SLEEP_MODE (1 << 4) // 0 = normal sleep (pico is shutdown, STM32 enter in low power state ~1.2mA); 1 = deep sleep (pico is shutdown, STM32 enter a stop state ~24uA)
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uint8_t reg_get_value(enum reg_id reg);
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uint8_t* reg_raw_access(void);
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void reg_set_value(enum reg_id reg, uint8_t value);
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uint8_t reg_is_bit_set(enum reg_id reg, uint8_t bit);
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void reg_set_bit(enum reg_id reg, uint8_t bit);
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void reg_init(void);
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uint32_t reg_check_and_save_eeprom(void);
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void reg_sync(void);
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#endif /* REGS_H_ */
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