JackCarterSmith jackcartersmith
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JackCarterSmith pushed to master at jackcartersmith/Course-Vulkan 2026-04-07 17:06:47 +02:00
8671917020 07-vk-pipeline
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-05 22:08:47 +02:00
2536311773 Restructure project folder
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-05 20:55:20 +02:00
5dad2e8622 Restructure project folder
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-04 17:06:32 +02:00
c05b6792be Restructure project folder
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-04 17:04:55 +02:00
aee6a99298 Restructure project folder
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-04 17:01:18 +02:00
b5ef4753cd Restructure project folder
JackCarterSmith opened issue jackcartersmith/picocalc_BIOS#4 2026-04-04 14:04:36 +02:00
PWR_OFF register behavior fix
JackCarterSmith commented on issue jackcartersmith/picocalc_BIOS#1 2026-04-04 13:42:57 +02:00
I2C slave review

Clock stretching seem to triggers some errors on the bus if the master frequency is different of the one configured on the slave. 100 <=> 100 ]> OK (no error in 24h over 4.32B requests,…

JackCarterSmith pushed to master at jackcartersmith/weblog 2026-04-01 20:09:27 +02:00
314c412adf Added stuff to force gitea CI
JackCarterSmith pushed to master at jackcartersmith/weblog 2026-04-01 20:06:08 +02:00
657899be7f Added stuff to force gitea CI
JackCarterSmith pushed to master at jackcartersmith/weblog 2026-04-01 20:04:31 +02:00
9510dd2b20 Added stuff to force gitea CI
JackCarterSmith pushed to master at jackcartersmith/weblog 2026-04-01 19:56:42 +02:00
316d9d67f5 Update runner flow
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 19:45:22 +02:00
deb7863b51 Moved fifo TB to util-lib
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 18:28:18 +02:00
25c9afef40 Experiment CI
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 18:05:50 +02:00
b0543e61c6 Experiment CI
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 18:03:07 +02:00
6a237471a2 Experiment CI
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 17:56:52 +02:00
7d06ee1185 Experiment CI
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 17:52:14 +02:00
465c906326 Experiment CI
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 17:46:49 +02:00
1d944d8c0c Experiment CI
JackCarterSmith pushed to master at jackcartersmith/FPU-VHDL 2026-04-01 17:39:34 +02:00
cbcb108e1f Experiment CI