Niels Moseley
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363c6c8c62
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* Fixed issues for the borken ISE verilog compiler.
* Added beginnings of Spartan 3E starterkit board project.
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2018-01-12 02:29:13 +01:00 |
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Niels Moseley
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eab24a0896
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Updated license information in each verilog source file.
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2018-01-12 02:06:27 +01:00 |
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Niels Moseley
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7d1198ee1b
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Almost working DE0 board version
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2017-10-26 00:47:50 +02:00 |
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Niels Moseley
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31163effd9
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Updated filter engine FSM to have named states and separated clocked and non-clocked processes. Fixed bug in spmul which caused incorrect sign handling in final product
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2017-10-24 19:40:56 +02:00 |
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Niels Moseley
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cf89706963
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Fix bugs in the filter engine FSM. Verified correct behaviour with a 2nd order section.
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2017-10-18 22:03:16 +02:00 |
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Niels Moseley
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541fb228ed
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Added filter engine
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2017-10-18 17:19:15 +02:00 |
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Niels Moseley
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b9789bc4c4
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serial/parallel multiplier now supports sign-magnitude coefficients
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2017-10-10 02:55:49 +02:00 |
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Niels Moseley
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4f30621f28
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Added serial/parallel multiplier.
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2017-10-10 02:27:48 +02:00 |
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