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doc: stm32l1: timer: fix params, missing groupings

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This commit is contained in:
Karl Palsson 2019-06-17 20:37:09 +00:00
parent c28a5a81cf
commit 2d0d29d946
2 changed files with 7 additions and 9 deletions
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13
include/libopencm3/stm32/l1/timer.h
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@ -37,6 +37,8 @@ LGPL License Terms @ref lgpl_license
#include <libopencm3/stm32/common/timer_common_all.h> #include <libopencm3/stm32/common/timer_common_all.h>
/**@{*/
/* /*
* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide: * TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
* CNT, ARR, CCR1, CCR2, CCR3, CCR4 * CNT, ARR, CCR1, CCR2, CCR3, CCR4
@ -51,10 +53,7 @@ LGPL License Terms @ref lgpl_license
/* ITR1_RMP */ /* ITR1_RMP */
/****************************************************************************/ /****************************************************************************/
/** @defgroup tim2_opt_trigger_remap TIM2_OR Timer 2 Option Register Internal /** @defgroup tim2_opt_trigger_remap TIM2_OR Timer 2 Internal Trigger 1 Remap
Trigger 1 Remap
@ingroup timer_defines
@{*/ @{*/
/** Internal Trigger 1 remapped to timer 10 output compare */ /** Internal Trigger 1 remapped to timer 10 output compare */
#define TIM2_OR_ITR1_RMP_TIM10_OC (0x0 << 0) #define TIM2_OR_ITR1_RMP_TIM10_OC (0x0 << 0)
@ -67,9 +66,7 @@ Trigger 1 Remap
/* ITR2_RMP */ /* ITR2_RMP */
/****************************************************************************/ /****************************************************************************/
/** @defgroup tim3_opt_trigger_remap TIM3_OR Timer 3 Option Register Internal Trigger 2 Remap /** @defgroup tim3_opt_trigger_remap TIM3_OR Timer 3 Internal Trigger 2 Remap
@ingroup timer_defines
@{*/ @{*/
/** Internal Trigger 1 remapped to timer 11 output compare */ /** Internal Trigger 1 remapped to timer 11 output compare */
#define TIM3_OR_ITR2_RMP_TIM8_TRGOU (0x0 << 0) #define TIM3_OR_ITR2_RMP_TIM8_TRGOU (0x0 << 0)
@ -86,4 +83,6 @@ void timer_set_option(uint32_t timer_peripheral, uint32_t option);
END_DECLS END_DECLS
/**@}*/
#endif #endif

3
lib/stm32/l1/timer.c
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@ -38,8 +38,7 @@
Set timer options register on TIM2 or TIM3, used for trigger remapping. Set timer options register on TIM2 or TIM3, used for trigger remapping.
@param[in] timer_peripheral Unsigned int32. Timer register address base @param[in] timer_peripheral Unsigned int32. Timer register address base
@returns Unsigned int32. Option flags TIM2: @ref tim2_opt_trigger_remap, TIM3: @param[in] option Desired option @ref tim2_opt_trigger_remap and @ref tim3_opt_trigger_remap
@ref tim3_opt_trigger_remap.
*/ */
void timer_set_option(uint32_t timer_peripheral, uint32_t option) void timer_set_option(uint32_t timer_peripheral, uint32_t option)