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Stile fixes run, 80 char boundry.

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This commit is contained in:
Piotr Esden-Tempski 2013-06-12 21:00:50 -07:00
parent 34de1e776e
commit 39fa9e4c58
45 changed files with 274 additions and 177 deletions
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3
include/libopencm3/cm3/scb.h
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@ -173,7 +173,8 @@
/* Bits [31:30]: reserved - must be kept cleared */ /* Bits [31:30]: reserved - must be kept cleared */
/* TBLOFF[29:9]: Vector table base offset field */ /* TBLOFF[29:9]: Vector table base offset field */
#define SCB_VTOR_TBLOFF_LSB 9 /* inconsistent datasheet - LSB could be 11 */ /* inconsistent datasheet - LSB could be 11 */
#define SCB_VTOR_TBLOFF_LSB 9
/* --- SCB_AIRCR values ---------------------------------------------------- */ /* --- SCB_AIRCR values ---------------------------------------------------- */

3
include/libopencm3/efm32/efm32lg/doc-efm32lg.h
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@ -21,7 +21,8 @@ LGPL License Terms @ref lgpl_license
/** @defgroup EFM32LG_defines EFM32 Leopard Gecko Defines /** @defgroup EFM32LG_defines EFM32 Leopard Gecko Defines
@brief Defined Constants and Types for the Energy Micro EFM32 Leopard Gecko series @brief Defined Constants and Types for the Energy Micro EFM32 Leopard Gecko
series
@version 1.0.0 @version 1.0.0

10
include/libopencm3/lm4f/gpio.h
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@ -217,8 +217,8 @@ enum gpio_trigger {
BEGIN_DECLS BEGIN_DECLS
void gpio_enable_ahb_aperture(void); void gpio_enable_ahb_aperture(void);
void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode, enum gpio_pullup pullup, void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode,
uint8_t gpios); enum gpio_pullup pullup, uint8_t gpios);
void gpio_set_output_config(uint32_t gpioport, enum gpio_output_type otype, void gpio_set_output_config(uint32_t gpioport, enum gpio_output_type otype,
enum gpio_drive_strength drive, uint8_t gpios); enum gpio_drive_strength drive, uint8_t gpios);
void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint8_t gpios); void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint8_t gpios);
@ -319,7 +319,8 @@ static inline uint8_t gpio_port_read(uint32_t gpioport)
/** /**
* \brief Set level of of all pins from a port (atomic) * \brief Set level of of all pins from a port (atomic)
* *
* Set the level of all pins on the given GPIO port. This is an atomic operation. * Set the level of all pins on the given GPIO port. This is an atomic
* operation.
* *
* This is functionally identical to @ref gpio_write (gpioport, GPIO_ALL, data). * This is functionally identical to @ref gpio_write (gpioport, GPIO_ALL, data).
* *
@ -335,7 +336,8 @@ static inline void gpio_port_write(uint32_t gpioport, uint8_t data)
} }
/** @} */ /** @} */
void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger, uint8_t gpios); void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger,
uint8_t gpios);
void gpio_enable_interrupts(uint32_t gpioport, uint8_t gpios); void gpio_enable_interrupts(uint32_t gpioport, uint8_t gpios);
void gpio_disable_interrupts(uint32_t gpioport, uint8_t gpios); void gpio_disable_interrupts(uint32_t gpioport, uint8_t gpios);

33
include/libopencm3/stm32/can.h
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@ -646,26 +646,31 @@ BEGIN_DECLS
void can_reset(uint32_t canport); void can_reset(uint32_t canport);
int can_init(uint32_t canport, bool ttcm, bool abom, bool awum, bool nart, int can_init(uint32_t canport, bool ttcm, bool abom, bool awum, bool nart,
bool rflm, bool txfp, uint32_t sjw, uint32_t ts1, uint32_t ts2, uint32_t brp, bool rflm, bool txfp, uint32_t sjw, uint32_t ts1, uint32_t ts2,
bool loopback, bool silent); uint32_t brp, bool loopback, bool silent);
void can_filter_init(uint32_t canport, uint32_t nr, bool scale_32bit, bool id_list_mode, void can_filter_init(uint32_t canport, uint32_t nr, bool scale_32bit,
uint32_t fr1, uint32_t fr2, uint32_t fifo, bool enable); bool id_list_mode, uint32_t fr1, uint32_t fr2,
void can_filter_id_mask_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1, uint16_t mask1, uint32_t fifo, bool enable);
uint16_t id2, uint16_t mask2, uint32_t fifo, bool enable); void can_filter_id_mask_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1,
void can_filter_id_mask_32bit_init(uint32_t canport, uint32_t nr, uint32_t id, uint32_t mask, uint16_t mask1, uint16_t id2,
uint32_t fifo, bool enable); uint16_t mask2, uint32_t fifo, bool enable);
void can_filter_id_list_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1, uint16_t id2, void can_filter_id_mask_32bit_init(uint32_t canport, uint32_t nr, uint32_t id,
uint16_t id3, uint16_t id4, uint32_t fifo, bool enable); uint32_t mask, uint32_t fifo, bool enable);
void can_filter_id_list_32bit_init(uint32_t canport, uint32_t nr, uint32_t id1, uint32_t id2, void can_filter_id_list_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1,
uint16_t id2, uint16_t id3, uint16_t id4,
uint32_t fifo, bool enable); uint32_t fifo, bool enable);
void can_filter_id_list_32bit_init(uint32_t canport, uint32_t nr, uint32_t id1,
uint32_t id2, uint32_t fifo, bool enable);
void can_enable_irq(uint32_t canport, uint32_t irq); void can_enable_irq(uint32_t canport, uint32_t irq);
void can_disable_irq(uint32_t canport, uint32_t irq); void can_disable_irq(uint32_t canport, uint32_t irq);
int can_transmit(uint32_t canport, uint32_t id, bool ext, bool rtr, uint8_t length, uint8_t *data); int can_transmit(uint32_t canport, uint32_t id, bool ext, bool rtr,
void can_receive(uint32_t canport, uint8_t fifo, bool release, uint32_t *id, bool *ext, uint8_t length, uint8_t *data);
bool *rtr, uint32_t *fmi, uint8_t *length, uint8_t *data); void can_receive(uint32_t canport, uint8_t fifo, bool release, uint32_t *id,
bool *ext, bool *rtr, uint32_t *fmi, uint8_t *length,
uint8_t *data);
void can_fifo_release(uint32_t canport, uint8_t fifo); void can_fifo_release(uint32_t canport, uint8_t fifo);
bool can_available_mailbox(uint32_t canport); bool can_available_mailbox(uint32_t canport);

12
include/libopencm3/stm32/common/dac_common_all.h
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@ -95,7 +95,8 @@ specific memorymap.h header before including this header file.*/
* Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**n)-1 * Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**n)-1
*/ */
#define DAC_CR_MAMP2_SHIFT 24 #define DAC_CR_MAMP2_SHIFT 24
/** @defgroup dac_mamp2 DAC Channel 2 LFSR Mask and Triangle Wave Amplitude values /** @defgroup dac_mamp2 DAC Channel 2 LFSR Mask and Triangle Wave Amplitude
values
@ingroup dac_defines @ingroup dac_defines
Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**(n)-1 Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**(n)-1
@ -207,7 +208,8 @@ Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**(n)-1
* Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**n)-1 * Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**n)-1
*/ */
#define DAC_CR_MAMP1_SHIFT 8 #define DAC_CR_MAMP1_SHIFT 8
/** @defgroup dac_mamp1 DAC Channel 1 LFSR Mask and Triangle Wave Amplitude values /** @defgroup dac_mamp1 DAC Channel 1 LFSR Mask and Triangle Wave Amplitude
values
@ingroup dac_defines @ingroup dac_defines
Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**(n+1)-1 Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**(n+1)-1
@ -404,8 +406,10 @@ void dac_set_trigger_source(uint32_t dac_trig_src);
void dac_set_waveform_generation(uint32_t dac_wave_ens); void dac_set_waveform_generation(uint32_t dac_wave_ens);
void dac_disable_waveform_generation(data_channel dac_channel); void dac_disable_waveform_generation(data_channel dac_channel);
void dac_set_waveform_characteristics(uint32_t dac_mamp); void dac_set_waveform_characteristics(uint32_t dac_mamp);
void dac_load_data_buffer_single(uint16_t dac_data, data_align dac_data_format, data_channel dac_channel); void dac_load_data_buffer_single(uint16_t dac_data, data_align dac_data_format,
void dac_load_data_buffer_dual(uint16_t dac_data1, uint16_t dac_data2, data_align dac_data_format); data_channel dac_channel);
void dac_load_data_buffer_dual(uint16_t dac_data1, uint16_t dac_data2,
data_align dac_data_format);
void dac_software_trigger(data_channel dac_channel); void dac_software_trigger(data_channel dac_channel);
END_DECLS END_DECLS

9
include/libopencm3/stm32/common/dma_common_f13.h
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@ -386,12 +386,14 @@ group.
BEGIN_DECLS BEGIN_DECLS
void dma_channel_reset(uint32_t dma, uint8_t channel); void dma_channel_reset(uint32_t dma, uint8_t channel);
void dma_clear_interrupt_flags(uint32_t dma, uint8_t channel, uint32_t interrupts); void dma_clear_interrupt_flags(uint32_t dma, uint8_t channel,
uint32_t interrupts);
bool dma_get_interrupt_flag(uint32_t dma, uint8_t channel, uint32_t interrupts); bool dma_get_interrupt_flag(uint32_t dma, uint8_t channel, uint32_t interrupts);
void dma_enable_mem2mem_mode(uint32_t dma, uint8_t channel); void dma_enable_mem2mem_mode(uint32_t dma, uint8_t channel);
void dma_set_priority(uint32_t dma, uint8_t channel, uint32_t prio); void dma_set_priority(uint32_t dma, uint8_t channel, uint32_t prio);
void dma_set_memory_size(uint32_t dma, uint8_t channel, uint32_t mem_size); void dma_set_memory_size(uint32_t dma, uint8_t channel, uint32_t mem_size);
void dma_set_peripheral_size(uint32_t dma, uint8_t channel, uint32_t peripheral_size); void dma_set_peripheral_size(uint32_t dma, uint8_t channel,
uint32_t peripheral_size);
void dma_enable_memory_increment_mode(uint32_t dma, uint8_t channel); void dma_enable_memory_increment_mode(uint32_t dma, uint8_t channel);
void dma_disable_memory_increment_mode(uint32_t dma, uint8_t channel); void dma_disable_memory_increment_mode(uint32_t dma, uint8_t channel);
void dma_enable_peripheral_increment_mode(uint32_t dma, uint8_t channel); void dma_enable_peripheral_increment_mode(uint32_t dma, uint8_t channel);
@ -407,7 +409,8 @@ void dma_enable_transfer_complete_interrupt(uint32_t dma, uint8_t channel);
void dma_disable_transfer_complete_interrupt(uint32_t dma, uint8_t channel); void dma_disable_transfer_complete_interrupt(uint32_t dma, uint8_t channel);
void dma_enable_channel(uint32_t dma, uint8_t channel); void dma_enable_channel(uint32_t dma, uint8_t channel);
void dma_disable_channel(uint32_t dma, uint8_t channel); void dma_disable_channel(uint32_t dma, uint8_t channel);
void dma_set_peripheral_address(uint32_t dma, uint8_t channel, uint32_t address); void dma_set_peripheral_address(uint32_t dma, uint8_t channel,
uint32_t address);
void dma_set_memory_address(uint32_t dma, uint8_t channel, uint32_t address); void dma_set_memory_address(uint32_t dma, uint8_t channel, uint32_t address);
void dma_set_number_of_data(uint32_t dma, uint8_t channel, uint16_t number); void dma_set_number_of_data(uint32_t dma, uint8_t channel, uint16_t number);

6
include/libopencm3/stm32/common/dma_common_f24.h
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@ -573,12 +573,14 @@ BEGIN_DECLS
*/ */
void dma_stream_reset(uint32_t dma, uint8_t stream); void dma_stream_reset(uint32_t dma, uint8_t stream);
void dma_clear_interrupt_flags(uint32_t dma, uint8_t stream, uint32_t interrupts); void dma_clear_interrupt_flags(uint32_t dma, uint8_t stream,
uint32_t interrupts);
bool dma_get_interrupt_flag(uint32_t dma, uint8_t stream, uint32_t interrupt); bool dma_get_interrupt_flag(uint32_t dma, uint8_t stream, uint32_t interrupt);
void dma_set_transfer_mode(uint32_t dma, uint8_t stream, uint32_t direction); void dma_set_transfer_mode(uint32_t dma, uint8_t stream, uint32_t direction);
void dma_set_priority(uint32_t dma, uint8_t stream, uint32_t prio); void dma_set_priority(uint32_t dma, uint8_t stream, uint32_t prio);
void dma_set_memory_size(uint32_t dma, uint8_t stream, uint32_t mem_size); void dma_set_memory_size(uint32_t dma, uint8_t stream, uint32_t mem_size);
void dma_set_peripheral_size(uint32_t dma, uint8_t stream, uint32_t peripheral_size); void dma_set_peripheral_size(uint32_t dma, uint8_t stream,
uint32_t peripheral_size);
void dma_enable_memory_increment_mode(uint32_t dma, uint8_t stream); void dma_enable_memory_increment_mode(uint32_t dma, uint8_t stream);
void dma_disable_memory_increment_mode(uint32_t dma, uint8_t channel); void dma_disable_memory_increment_mode(uint32_t dma, uint8_t channel);
void dma_enable_peripheral_increment_mode(uint32_t dma, uint8_t stream); void dma_enable_peripheral_increment_mode(uint32_t dma, uint8_t stream);

6
include/libopencm3/stm32/common/gpio_common_f24.h
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@ -287,8 +287,10 @@ BEGIN_DECLS
* sounding functions that have very different functionality. * sounding functions that have very different functionality.
*/ */
void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down, uint16_t gpios); void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down,
void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed, uint16_t gpios); uint16_t gpios);
void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed,
uint16_t gpios);
void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint16_t gpios); void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint16_t gpios);
END_DECLS END_DECLS

3
include/libopencm3/stm32/common/spi_common_all.h
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@ -356,7 +356,8 @@ specific memorymap.h header before including this header file.*/
BEGIN_DECLS BEGIN_DECLS
void spi_reset(uint32_t spi_peripheral); void spi_reset(uint32_t spi_peripheral);
int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha, uint32_t dff, uint32_t lsbfirst); int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
uint32_t dff, uint32_t lsbfirst);
void spi_enable(uint32_t spi); void spi_enable(uint32_t spi);
void spi_disable(uint32_t spi); void spi_disable(uint32_t spi);
uint16_t spi_clean_disable(uint32_t spi); uint16_t spi_clean_disable(uint32_t spi);

23
include/libopencm3/stm32/common/timer_common_all.h
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@ -1070,16 +1070,20 @@ void timer_disable_oc_clear(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_set_oc_fast_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_set_oc_fast_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_set_oc_slow_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_set_oc_slow_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_set_oc_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id, void timer_set_oc_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id,
enum tim_oc_mode oc_mode); enum tim_oc_mode oc_mode);
void timer_enable_oc_preload(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_enable_oc_preload(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_disable_oc_preload(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_disable_oc_preload(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_set_oc_polarity_high(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_set_oc_polarity_high(uint32_t timer_peripheral,
enum tim_oc_id oc_id);
void timer_set_oc_polarity_low(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_set_oc_polarity_low(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_enable_oc_output(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_enable_oc_output(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_disable_oc_output(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_disable_oc_output(uint32_t timer_peripheral, enum tim_oc_id oc_id);
void timer_set_oc_idle_state_set(uint32_t timer_peripheral, enum tim_oc_id oc_id); void timer_set_oc_idle_state_set(uint32_t timer_peripheral,
void timer_set_oc_idle_state_unset(uint32_t timer_peripheral, enum tim_oc_id oc_id); enum tim_oc_id oc_id);
void timer_set_oc_value(uint32_t timer_peripheral, enum tim_oc_id oc_id, uint32_t value); void timer_set_oc_idle_state_unset(uint32_t timer_peripheral,
enum tim_oc_id oc_id);
void timer_set_oc_value(uint32_t timer_peripheral, enum tim_oc_id oc_id,
uint32_t value);
void timer_enable_break_main_output(uint32_t timer_peripheral); void timer_enable_break_main_output(uint32_t timer_peripheral);
void timer_disable_break_main_output(uint32_t timer_peripheral); void timer_disable_break_main_output(uint32_t timer_peripheral);
void timer_enable_break_automatic_output(uint32_t timer_peripheral); void timer_enable_break_automatic_output(uint32_t timer_peripheral);
@ -1098,9 +1102,12 @@ void timer_generate_event(uint32_t timer_peripheral, uint32_t event);
uint32_t timer_get_counter(uint32_t timer_peripheral); uint32_t timer_get_counter(uint32_t timer_peripheral);
void timer_set_counter(uint32_t timer_peripheral, uint32_t count); void timer_set_counter(uint32_t timer_peripheral, uint32_t count);
void timer_ic_set_filter(uint32_t timer, enum tim_ic_id ic, enum tim_ic_filter flt); void timer_ic_set_filter(uint32_t timer, enum tim_ic_id ic,
void timer_ic_set_prescaler(uint32_t timer, enum tim_ic_id ic, enum tim_ic_psc psc); enum tim_ic_filter flt);
void timer_ic_set_input(uint32_t timer, enum tim_ic_id ic, enum tim_ic_input in); void timer_ic_set_prescaler(uint32_t timer, enum tim_ic_id ic,
enum tim_ic_psc psc);
void timer_ic_set_input(uint32_t timer, enum tim_ic_id ic,
enum tim_ic_input in);
void timer_ic_enable(uint32_t timer, enum tim_ic_id ic); void timer_ic_enable(uint32_t timer, enum tim_ic_id ic);
void timer_ic_disable(uint32_t timer, enum tim_ic_id ic); void timer_ic_disable(uint32_t timer, enum tim_ic_id ic);

6
include/libopencm3/stm32/common/timer_common_f24.h
View File

@ -49,7 +49,8 @@ specific memorymap.h header before including this header file.*/
/* ITR1_RMP */ /* ITR1_RMP */
/****************************************************************************/ /****************************************************************************/
/** @defgroup tim2_opt_trigger_remap TIM2_OR Timer 2 Option Register Internal Trigger 1 Remap /** @defgroup tim2_opt_trigger_remap TIM2_OR Timer 2 Option Register Internal
Trigger 1 Remap
Only available in F2 and F4 series. Only available in F2 and F4 series.
@ingroup timer_defines @ingroup timer_defines
@ -99,7 +100,8 @@ enum tim_ic_pol {
BEGIN_DECLS BEGIN_DECLS
void timer_set_option(uint32_t timer_peripheral, uint32_t option); void timer_set_option(uint32_t timer_peripheral, uint32_t option);
void timer_ic_set_polarity(uint32_t timer, enum tim_ic_id ic, enum tim_ic_pol pol); void timer_ic_set_polarity(uint32_t timer, enum tim_ic_id ic,
enum tim_ic_pol pol);
END_DECLS END_DECLS

6
include/libopencm3/stm32/f1/adc.h
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@ -605,7 +605,8 @@ and ADC2
/* JL[2:0]: Discontinous mode channel count injected channels. */ /* JL[2:0]: Discontinous mode channel count injected channels. */
/****************************************************************************/ /****************************************************************************/
/** @defgroup adc_jsqr_jl ADC Number of channels in discontinuous mode fro injected channels. /** @defgroup adc_jsqr_jl ADC Number of channels in discontinuous mode fro
injected channels.
@ingroup adc_defines @ingroup adc_defines
@{*/ @{*/
@ -655,7 +656,8 @@ void adc_disable_discontinuous_mode_injected(uint32_t adc);
void adc_enable_automatic_injected_group_conversion(uint32_t adc); void adc_enable_automatic_injected_group_conversion(uint32_t adc);
void adc_disable_automatic_injected_group_conversion(uint32_t adc); void adc_disable_automatic_injected_group_conversion(uint32_t adc);
void adc_enable_analog_watchdog_on_all_channels(uint32_t adc); void adc_enable_analog_watchdog_on_all_channels(uint32_t adc);
void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc, uint8_t channel); void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc,
uint8_t channel);
void adc_enable_scan_mode(uint32_t adc); void adc_enable_scan_mode(uint32_t adc);
void adc_disable_scan_mode(uint32_t adc); void adc_disable_scan_mode(uint32_t adc);
void adc_enable_eoc_interrupt_injected(uint32_t adc); void adc_enable_eoc_interrupt_injected(uint32_t adc);

3
include/libopencm3/stm32/f1/gpio.h
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@ -948,7 +948,8 @@ Line Devices only
BEGIN_DECLS BEGIN_DECLS
void gpio_set_mode(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint16_t gpios); void gpio_set_mode(uint32_t gpioport, uint8_t mode, uint8_t cnf,
uint16_t gpios);
void gpio_set_eventout(uint8_t evoutport, uint8_t evoutpin); void gpio_set_eventout(uint8_t evoutport, uint8_t evoutpin);
void gpio_primary_remap(uint32_t swjenable, uint32_t maps); void gpio_primary_remap(uint32_t swjenable, uint32_t maps);
void gpio_secondary_remap(uint32_t maps); void gpio_secondary_remap(uint32_t maps);

4
include/libopencm3/stm32/f1/timer.h
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@ -47,7 +47,9 @@ enum tim_ic_pol {
BEGIN_DECLS BEGIN_DECLS
void timer_ic_set_polarity(uint32_t timer, enum tim_ic_id ic, enum tim_ic_pol pol); void timer_ic_set_polarity(uint32_t timer,
enum tim_ic_id ic,
enum tim_ic_pol pol);
END_DECLS END_DECLS

54
include/libopencm3/stm32/f1/usb_desc.h
View File

@ -34,55 +34,55 @@ struct usb_desc_head {
struct usb_device_desc { struct usb_device_desc {
struct usb_desc_head h; /* Size 0x12, ID 0x01 */ struct usb_desc_head h; /* Size 0x12, ID 0x01 */
uint16_t bcd_usb; /* USB Version */ uint16_t bcd_usb; /* USB Version */
uint8_t class; /* Device class */ uint8_t class; /* Device class */
uint8_t sub_class; /* Subclass code */ uint8_t sub_class; /* Subclass code */
uint8_t protocol; /* Protocol code */ uint8_t protocol; /* Protocol code */
uint8_t max_psize; /* Maximum packet size -> 64bytes */ uint8_t max_psize; /* Maximum packet size -> 64bytes */
uint16_t vendor; /* Vendor number */ uint16_t vendor; /* Vendor number */
uint16_t product; /* Device number */ uint16_t product; /* Device number */
uint16_t bcd_dev; /* Device version */ uint16_t bcd_dev; /* Device version */
uint8_t man_desc; /* Index of manufacturer string desc */ uint8_t man_desc; /* Index of manufacturer string desc */
uint8_t prod_desc; /* Index of product string desc */ uint8_t prod_desc; /* Index of product string desc */
uint8_t sn_desc; /* Index of serial number string desc */ uint8_t sn_desc; /* Index of serial number string desc */
uint8_t num_conf; /* Number of possible configurations */ uint8_t num_conf; /* Number of possible configurations */
}; };
struct usb_conf_desc_header { struct usb_conf_desc_header {
struct usb_desc_head h; /* Size 0x09, Id 0x02 */ struct usb_desc_head h; /* Size 0x09, Id 0x02 */
uint16_t tot_leng; /* Total length of data */ uint16_t tot_leng; /* Total length of data */
uint8_t num_int; /* Number of interfaces */ uint8_t num_int; /* Number of interfaces */
uint8_t conf_val; /* Configuration selector */ uint8_t conf_val; /* Configuration selector */
uint8_t conf_desc; /* Index of conf string desc */ uint8_t conf_desc; /* Index of conf string desc */
uint8_t attr; /* Attribute bitmap: uint8_t attr; /* Attribute bitmap:
* 7 : Bus powered * 7 : Bus powered
* 6 : Self powered * 6 : Self powered
* 5 : Remote wakeup * 5 : Remote wakeup
* 4..0 : Reserved -> 0000 * 4..0 : Reserved -> 0000
*/ */
uint8_t max_power; /* Maximum power consumption in 2mA steps */ uint8_t max_power; /* Maximum power consumption in 2mA steps */
}; };
struct usb_int_desc_header { struct usb_int_desc_header {
struct usb_desc_head h; /* Size 0x09, Id 0x04 */ struct usb_desc_head h; /* Size 0x09, Id 0x04 */
uint8_t iface_num; /* Interface id number */ uint8_t iface_num; /* Interface id number */
uint8_t alt_setting; /* Alternative setting selector */ uint8_t alt_setting; /* Alternative setting selector */
uint8_t num_endp; /* Endpoints used */ uint8_t num_endp; /* Endpoints used */
uint8_t class; /* Interface class */ uint8_t class; /* Interface class */
uint8_t sub_class; /* Subclass code */ uint8_t sub_class; /* Subclass code */
uint8_t protocol; /* Protocol code */ uint8_t protocol; /* Protocol code */
uint8_t iface_desc; /* Index of interface string desc */ uint8_t iface_desc; /* Index of interface string desc */
}; };
struct usb_ep_desc { struct usb_ep_desc {
struct usb_desc_head h; /* Size 0x07, Id 0x05 */ struct usb_desc_head h; /* Size 0x07, Id 0x05 */
uint8_t ep_addr; /* Endpoint address: uint8_t ep_addr; /* Endpoint address:
0..3 : Endpoint Number 0..3 : Endpoint Number
4..6 : Reserved -> 0 4..6 : Reserved -> 0
7 : Direction 0=out 1=in */ 7 : Direction 0=out 1=in */
uint8_t ep_attr; /* Endpoint attributes */ uint8_t ep_attr; /* Endpoint attributes */
uint16_t max_psize; /* Maximum packet size -> 64bytes */ uint16_t max_psize; /* Maximum packet size -> 64bytes */
uint8_t interval; /* Interval for polling endpoint uint8_t interval; /* Interval for polling endpoint
data. Ignored for bulk & control data. Ignored for bulk & control
endpoints. */ endpoints. */
}; };
@ -95,7 +95,7 @@ struct usb_conf_desc {
struct usb_string_desc { struct usb_string_desc {
struct usb_desc_head h; /* Size > 0x02, Id 0x03 */ struct usb_desc_head h; /* Size > 0x02, Id 0x03 */
uint16_t string[]; /* String UTF16 encoded */ uint16_t string[]; /* String UTF16 encoded */
}; };
#endif #endif

6
include/libopencm3/stm32/f2/rcc.h
View File

@ -505,8 +505,10 @@ void rcc_set_ppre2(uint32_t ppre2);
void rcc_set_ppre1(uint32_t ppre1); void rcc_set_ppre1(uint32_t ppre1);
void rcc_set_hpre(uint32_t hpre); void rcc_set_hpre(uint32_t hpre);
void rcc_set_rtcpre(uint32_t rtcpre); void rcc_set_rtcpre(uint32_t rtcpre);
void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq); void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq); uint32_t pllq);
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq);
uint32_t rcc_system_clock_source(void); uint32_t rcc_system_clock_source(void);
void rcc_clock_setup_hse_3v3(const clock_scale_t *clock); void rcc_clock_setup_hse_3v3(const clock_scale_t *clock);
void rcc_backupdomain_reset(void); void rcc_backupdomain_reset(void);

9
include/libopencm3/stm32/f4/adc.h
View File

@ -804,7 +804,8 @@ void adc_disable_discontinuous_mode_injected(uint32_t adc);
void adc_enable_automatic_injected_group_conversion(uint32_t adc); void adc_enable_automatic_injected_group_conversion(uint32_t adc);
void adc_disable_automatic_injected_group_conversion(uint32_t adc); void adc_disable_automatic_injected_group_conversion(uint32_t adc);
void adc_enable_analog_watchdog_on_all_channels(uint32_t adc); void adc_enable_analog_watchdog_on_all_channels(uint32_t adc);
void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc, uint8_t channel); void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc,
uint8_t channel);
void adc_enable_scan_mode(uint32_t adc); void adc_enable_scan_mode(uint32_t adc);
void adc_disable_scan_mode(uint32_t adc); void adc_disable_scan_mode(uint32_t adc);
void adc_enable_eoc_interrupt_injected(uint32_t adc); void adc_enable_eoc_interrupt_injected(uint32_t adc);
@ -837,8 +838,10 @@ void adc_set_injected_offset(uint32_t adc, uint8_t reg, uint32_t offset);
void adc_set_clk_prescale(uint32_t prescaler); void adc_set_clk_prescale(uint32_t prescaler);
void adc_set_multi_mode(uint32_t mode); void adc_set_multi_mode(uint32_t mode);
void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger, uint32_t polarity); void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger,
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, uint32_t polarity); uint32_t polarity);
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
uint32_t polarity);
void adc_set_resolution(uint32_t adc, uint16_t resolution); void adc_set_resolution(uint32_t adc, uint16_t resolution);
void adc_enable_overrun_interrupt(uint32_t adc); void adc_enable_overrun_interrupt(uint32_t adc);
void adc_disable_overrun_interrupt(uint32_t adc); void adc_disable_overrun_interrupt(uint32_t adc);

6
include/libopencm3/stm32/f4/rcc.h
View File

@ -511,8 +511,10 @@ void rcc_set_ppre2(uint32_t ppre2);
void rcc_set_ppre1(uint32_t ppre1); void rcc_set_ppre1(uint32_t ppre1);
void rcc_set_hpre(uint32_t hpre); void rcc_set_hpre(uint32_t hpre);
void rcc_set_rtcpre(uint32_t rtcpre); void rcc_set_rtcpre(uint32_t rtcpre);
void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq); void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq); uint32_t pllq);
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq);
uint32_t rcc_system_clock_source(void); uint32_t rcc_system_clock_source(void);
void rcc_clock_setup_hse_3v3(const clock_scale_t *clock); void rcc_clock_setup_hse_3v3(const clock_scale_t *clock);
void rcc_backupdomain_reset(void); void rcc_backupdomain_reset(void);

6
include/libopencm3/stm32/l1/gpio.h
View File

@ -251,8 +251,10 @@ BEGIN_DECLS
* TODO: this should all really be moved to a "common" gpio header * TODO: this should all really be moved to a "common" gpio header
*/ */
void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down, uint16_t gpios); void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down,
void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed, uint16_t gpios); uint16_t gpios);
void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed,
uint16_t gpios);
void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint16_t gpios); void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint16_t gpios);
END_DECLS END_DECLS

3
include/libopencm3/stm32/l1/rcc.h
View File

@ -442,7 +442,8 @@ void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en);
void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset); void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset);
void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset); void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset);
void rcc_set_sysclk_source(uint32_t clk); void rcc_set_sysclk_source(uint32_t clk);
void rcc_set_pll_configuration(uint32_t source, uint32_t multiplier, uint32_t divisor); void rcc_set_pll_configuration(uint32_t source, uint32_t multiplier,
uint32_t divisor);
void rcc_set_pll_source(uint32_t pllsrc); void rcc_set_pll_source(uint32_t pllsrc);
void rcc_set_adcpre(uint32_t adcpre); void rcc_set_adcpre(uint32_t adcpre);
void rcc_set_ppre2(uint32_t ppre2); void rcc_set_ppre2(uint32_t ppre2);

9
include/libopencm3/stm32/otg_fs.h
View File

@ -39,8 +39,8 @@
#define OTG_FS_GCCFG MMIO32(USB_OTG_FS_BASE + 0x038) #define OTG_FS_GCCFG MMIO32(USB_OTG_FS_BASE + 0x038)
#define OTG_FS_CID MMIO32(USB_OTG_FS_BASE + 0x03C) #define OTG_FS_CID MMIO32(USB_OTG_FS_BASE + 0x03C)
#define OTG_FS_HPTXFSIZ MMIO32(USB_OTG_FS_BASE + 0x100) #define OTG_FS_HPTXFSIZ MMIO32(USB_OTG_FS_BASE + 0x100)
#define OTG_FS_DIEPTXF(x) MMIO32(USB_OTG_FS_BASE + 0x104 + \ #define OTG_FS_DIEPTXF(x) MMIO32(USB_OTG_FS_BASE + 0x104 \
4*(x-1)) + 4*(x-1))
/* Host-mode Control and Status Registers */ /* Host-mode Control and Status Registers */
#define OTG_FS_HCFG MMIO32(USB_OTG_FS_BASE + 0x400) #define OTG_FS_HCFG MMIO32(USB_OTG_FS_BASE + 0x400)
@ -89,8 +89,9 @@
#define OTG_FS_PCGCCTL MMIO32(USB_OTG_FS_BASE + 0xE00) #define OTG_FS_PCGCCTL MMIO32(USB_OTG_FS_BASE + 0xE00)
/* Data FIFO */ /* Data FIFO */
#define OTG_FS_FIFO(x) ((volatile uint32_t*)(USB_OTG_FS_BASE + \ #define OTG_FS_FIFO(x) ((volatile uint32_t*)(USB_OTG_FS_BASE \
(((x) + 1) << 12))) + (((x) + 1) \
<< 12)))
/* Global CSRs */ /* Global CSRs */
/* OTG_FS USB control registers (OTG_HS_GOTGCTL) */ /* OTG_FS USB control registers (OTG_HS_GOTGCTL) */

4
include/libopencm3/stm32/otg_hs.h
View File

@ -145,8 +145,8 @@
#define OTG_HS_PCGCCTL MMIO32(USB_OTG_HS_BASE + OTG_PCGCCTL) #define OTG_HS_PCGCCTL MMIO32(USB_OTG_HS_BASE + OTG_PCGCCTL)
/* Data FIFO */ /* Data FIFO */
#define OTG_HS_FIFO(x) ((volatile uint32_t*)(USB_OTG_HS_BASE + \ #define OTG_HS_FIFO(x) ((volatile uint32_t*)(USB_OTG_HS_BASE \
OTG_FIFO(x))) + OTG_FIFO(x)))
/* Global CSRs */ /* Global CSRs */
/* OTG_HS USB control registers (OTG_FS_GOTGCTL) */ /* OTG_HS USB control registers (OTG_FS_GOTGCTL) */

13
include/libopencm3/usb/usbd.h
View File

@ -63,7 +63,8 @@ extern usbd_device * usbd_init(const usbd_driver *driver,
const struct usb_device_descriptor *dev, const struct usb_device_descriptor *dev,
const struct usb_config_descriptor *conf, const struct usb_config_descriptor *conf,
const char **strings, int num_strings, const char **strings, int num_strings,
uint8_t *control_buffer, uint16_t control_buffer_size); uint8_t *control_buffer,
uint16_t control_buffer_size);
extern void usbd_register_reset_callback(usbd_device *usbd_dev, extern void usbd_register_reset_callback(usbd_device *usbd_dev,
void (*callback)(void)); void (*callback)(void));
@ -86,14 +87,15 @@ extern int usbd_register_control_callback(usbd_device *usbd_dev, uint8_t type,
/* <usb_standard.c> */ /* <usb_standard.c> */
extern void usbd_register_set_config_callback(usbd_device *usbd_dev, extern void usbd_register_set_config_callback(usbd_device *usbd_dev,
void (*callback)(usbd_device *usbd_dev, uint16_t wValue)); void (*callback)(usbd_device *usbd_dev, uint16_t wValue));
/* Functions to be provided by the hardware abstraction layer */ /* Functions to be provided by the hardware abstraction layer */
extern void usbd_poll(usbd_device *usbd_dev); extern void usbd_poll(usbd_device *usbd_dev);
extern void usbd_disconnect(usbd_device *usbd_dev, bool disconnected); extern void usbd_disconnect(usbd_device *usbd_dev, bool disconnected);
extern void usbd_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size, extern void usbd_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
void (*callback)(usbd_device *usbd_dev, uint8_t ep)); uint16_t max_size,
void (*callback)(usbd_device *usbd_dev, uint8_t ep));
extern uint16_t usbd_ep_write_packet(usbd_device *usbd_dev, uint8_t addr, extern uint16_t usbd_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
const void *buf, uint16_t len); const void *buf, uint16_t len);
@ -101,7 +103,8 @@ extern uint16_t usbd_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
extern uint16_t usbd_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, extern uint16_t usbd_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
void *buf, uint16_t len); void *buf, uint16_t len);
extern void usbd_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall); extern void usbd_ep_stall_set(usbd_device *usbd_dev, uint8_t addr,
uint8_t stall);
extern uint8_t usbd_ep_stall_get(usbd_device *usbd_dev, uint8_t addr); extern uint8_t usbd_ep_stall_get(usbd_device *usbd_dev, uint8_t addr);
extern void usbd_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak); extern void usbd_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak);

7
lib/lm4f/gpio.c
View File

@ -206,8 +206,8 @@ void gpio_enable_ahb_aperture(void)
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
* by OR'ing then together * by OR'ing then together
*/ */
void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode, enum gpio_pullup pullup, void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode,
uint8_t gpios) enum gpio_pullup pullup, uint8_t gpios)
{ {
switch (mode) { switch (mode) {
case GPIO_MODE_OUTPUT: case GPIO_MODE_OUTPUT:
@ -524,7 +524,8 @@ void gpio_toggle(uint32_t gpioport, uint8_t gpios)
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
* by OR'ing then together * by OR'ing then together
*/ */
void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger, uint8_t gpios) void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger,
uint8_t gpios)
{ {
switch (trigger) { switch (trigger) {
case GPIO_TRIG_LVL_LOW: case GPIO_TRIG_LVL_LOW:

15
lib/lm4f/usb_lm4f.c
View File

@ -22,7 +22,8 @@
* *
* @ingroup LM4Fxx * @ingroup LM4Fxx
* *
* @author @htmlonly &copy; @endhtmlonly 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com> * @author @htmlonly &copy; @endhtmlonly 2013
* Alexandru Gagniuc <mr.nuke.me@gmail.com>
* *
* \brief <b>libopencm3 LM4F Universal Serial Bus controller </b> * \brief <b>libopencm3 LM4F Universal Serial Bus controller </b>
* *
@ -183,8 +184,9 @@ static void lm4f_set_address(usbd_device *usbd_dev, uint8_t addr)
USB_FADDR = addr & USB_FADDR_FUNCADDR_MASK; USB_FADDR = addr & USB_FADDR_FUNCADDR_MASK;
} }
static void lm4f_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size, static void lm4f_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
void (*callback) (usbd_device *usbd_dev, uint8_t ep)) uint16_t max_size,
void (*callback) (usbd_device *usbd_dev, uint8_t ep))
{ {
(void)usbd_dev; (void)usbd_dev;
(void)type; (void)type;
@ -296,7 +298,8 @@ static void lm4f_endpoints_reset(usbd_device *usbd_dev)
usbd_dev->fifo_mem_top = 64; usbd_dev->fifo_mem_top = 64;
} }
static void lm4f_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall) static void lm4f_ep_stall_set(usbd_device *usbd_dev, uint8_t addr,
uint8_t stall)
{ {
(void)usbd_dev; (void)usbd_dev;
@ -405,8 +408,8 @@ static uint16_t lm4f_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
return i; return i;
} }
static uint16_t lm4f_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, static uint16_t lm4f_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
uint16_t len) void *buf, uint16_t len)
{ {
(void)usbd_dev; (void)usbd_dev;

35
lib/stm32/can.c
View File

@ -99,8 +99,8 @@ Initialize the selected CAN peripheral block.
@returns int 0 on success, 1 on initialization failure. @returns int 0 on success, 1 on initialization failure.
*/ */
int can_init(uint32_t canport, bool ttcm, bool abom, bool awum, bool nart, int can_init(uint32_t canport, bool ttcm, bool abom, bool awum, bool nart,
bool rflm, bool txfp, uint32_t sjw, uint32_t ts1, uint32_t ts2, uint32_t brp, bool rflm, bool txfp, uint32_t sjw, uint32_t ts1, uint32_t ts2,
bool loopback, bool silent) uint32_t brp, bool loopback, bool silent)
{ {
volatile uint32_t wait_ack; volatile uint32_t wait_ack;
int ret = 0; int ret = 0;
@ -206,8 +206,9 @@ Initialize incoming message filter and assign to FIFO.
@param[in] fifo Unsigned int32. FIFO id. @param[in] fifo Unsigned int32. FIFO id.
@param[in] enable bool. Enable filter? @param[in] enable bool. Enable filter?
*/ */
void can_filter_init(uint32_t canport, uint32_t nr, bool scale_32bit, bool id_list_mode, void can_filter_init(uint32_t canport, uint32_t nr, bool scale_32bit,
uint32_t fr1, uint32_t fr2, uint32_t fifo, bool enable) bool id_list_mode, uint32_t fr1, uint32_t fr2,
uint32_t fifo, bool enable)
{ {
uint32_t filter_select_bit = 0x00000001 << nr; uint32_t filter_select_bit = 0x00000001 << nr;
@ -266,8 +267,9 @@ void can_filter_init(uint32_t canport, uint32_t nr, bool scale_32bit, bool id_li
@param[in] fifo Unsigned int32. FIFO id. @param[in] fifo Unsigned int32. FIFO id.
@param[in] enable bool. Enable filter? @param[in] enable bool. Enable filter?
*/ */
void can_filter_id_mask_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1, uint16_t mask1, void can_filter_id_mask_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1,
uint16_t id2, uint16_t mask2, uint32_t fifo, bool enable) uint16_t mask1, uint16_t id2,
uint16_t mask2, uint32_t fifo, bool enable)
{ {
can_filter_init(canport, nr, false, false, can_filter_init(canport, nr, false, false,
((uint32_t)id1 << 16) | (uint32_t)mask1, ((uint32_t)id1 << 16) | (uint32_t)mask1,
@ -284,8 +286,8 @@ void can_filter_id_mask_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1,
@param[in] fifo Unsigned int32. FIFO id. @param[in] fifo Unsigned int32. FIFO id.
@param[in] enable bool. Enable filter? @param[in] enable bool. Enable filter?
*/ */
void can_filter_id_mask_32bit_init(uint32_t canport, uint32_t nr, uint32_t id, uint32_t mask, void can_filter_id_mask_32bit_init(uint32_t canport, uint32_t nr, uint32_t id,
uint32_t fifo, bool enable) uint32_t mask, uint32_t fifo, bool enable)
{ {
can_filter_init(canport, nr, true, false, id, mask, fifo, enable); can_filter_init(canport, nr, true, false, id, mask, fifo, enable);
} }
@ -302,8 +304,10 @@ void can_filter_id_mask_32bit_init(uint32_t canport, uint32_t nr, uint32_t id, u
@param[in] fifo Unsigned int32. FIFO id. @param[in] fifo Unsigned int32. FIFO id.
@param[in] enable bool. Enable filter? @param[in] enable bool. Enable filter?
*/ */
void can_filter_id_list_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1, uint16_t id2, void can_filter_id_list_16bit_init(uint32_t canport, uint32_t nr,
uint16_t id3, uint16_t id4, uint32_t fifo, bool enable) uint16_t id1, uint16_t id2,
uint16_t id3, uint16_t id4,
uint32_t fifo, bool enable)
{ {
can_filter_init(canport, nr, false, true, can_filter_init(canport, nr, false, true,
((uint32_t)id1 << 16) | (uint32_t)id2, ((uint32_t)id1 << 16) | (uint32_t)id2,
@ -320,7 +324,8 @@ void can_filter_id_list_16bit_init(uint32_t canport, uint32_t nr, uint16_t id1,
@param[in] fifo Unsigned int32. FIFO id. @param[in] fifo Unsigned int32. FIFO id.
@param[in] enable bool. Enable filter? @param[in] enable bool. Enable filter?
*/ */
void can_filter_id_list_32bit_init(uint32_t canport, uint32_t nr, uint32_t id1, uint32_t id2, void can_filter_id_list_32bit_init(uint32_t canport, uint32_t nr,
uint32_t id1, uint32_t id2,
uint32_t fifo, bool enable) uint32_t fifo, bool enable)
{ {
can_filter_init(canport, nr, true, true, id1, id2, fifo, enable); can_filter_init(canport, nr, true, true, id1, id2, fifo, enable);
@ -360,7 +365,8 @@ void can_disable_irq(uint32_t canport, uint32_t irq)
@returns int 0, 1 or 2 on success and depending on which outgoing mailbox got @returns int 0, 1 or 2 on success and depending on which outgoing mailbox got
selected. -1 if no mailbox was available and no transmission got queued. selected. -1 if no mailbox was available and no transmission got queued.
*/ */
int can_transmit(uint32_t canport, uint32_t id, bool ext, bool rtr, uint8_t length, uint8_t *data) int can_transmit(uint32_t canport, uint32_t id, bool ext, bool rtr,
uint8_t length, uint8_t *data)
{ {
int ret = 0; int ret = 0;
uint32_t mailbox = 0; uint32_t mailbox = 0;
@ -473,8 +479,9 @@ void can_fifo_release(uint32_t canport, uint8_t fifo)
@param[out] length Unsigned int8 pointer. Length of message payload. @param[out] length Unsigned int8 pointer. Length of message payload.
@param[out] data Unsigned int8[]. Message payload data. @param[out] data Unsigned int8[]. Message payload data.
*/ */
void can_receive(uint32_t canport, uint8_t fifo, bool release, uint32_t *id, bool *ext, void can_receive(uint32_t canport, uint8_t fifo, bool release, uint32_t *id,
bool *rtr, uint32_t *fmi, uint8_t *length, uint8_t *data) bool *ext, bool *rtr, uint32_t *fmi, uint8_t *length,
uint8_t *data)
{ {
uint32_t fifo_id = 0; uint32_t fifo_id = 0;
union { union {

5
lib/stm32/common/dac_common_all.c
View File

@ -339,8 +339,9 @@ existing output values in the DAC output registers.
@note The DAC trigger must be enabled for this to work. @note The DAC trigger must be enabled for this to work.
@param[in] dac_wave_ens uint32_t. Taken from @ref dac_wave1_en or @ref dac_wave2_en @param[in] dac_wave_ens uint32_t. Taken from @ref dac_wave1_en or @ref
or a logical OR of one of each of these to set both channels simultaneously. dac_wave2_en or a logical OR of one of each of these to set both channels
simultaneously.
*/ */
void dac_set_waveform_generation(uint32_t dac_wave_ens) void dac_set_waveform_generation(uint32_t dac_wave_ens)

6
lib/stm32/common/dma_common_f13.c
View File

@ -75,7 +75,8 @@ same channel may be cleared by using the logical OR of the interrupt flags.
dma_if_offset dma_if_offset
*/ */
void dma_clear_interrupt_flags(uint32_t dma, uint8_t channel, uint32_t interrupts) void dma_clear_interrupt_flags(uint32_t dma, uint8_t channel,
uint32_t interrupts)
{ {
/* Get offset to interrupt flag location in channel field */ /* Get offset to interrupt flag location in channel field */
uint32_t flags = (interrupts << DMA_FLAG_OFFSET(channel)); uint32_t flags = (interrupts << DMA_FLAG_OFFSET(channel));
@ -165,7 +166,8 @@ if the peripheral does not support byte or half-word writes.
dma_ch_perwidth. dma_ch_perwidth.
*/ */
void dma_set_peripheral_size(uint32_t dma, uint8_t channel, uint32_t peripheral_size) void dma_set_peripheral_size(uint32_t dma, uint8_t channel,
uint32_t peripheral_size)
{ {
DMA_CCR(dma, channel) &= ~(DMA_CCR_PSIZE_MASK); DMA_CCR(dma, channel) &= ~(DMA_CCR_PSIZE_MASK);
DMA_CCR(dma, channel) |= peripheral_size; DMA_CCR(dma, channel) |= peripheral_size;

6
lib/stm32/common/dma_common_f24.c
View File

@ -92,7 +92,8 @@ same stream may be cleared by using the bitwise OR of the interrupt flags.
dma_if_offset dma_if_offset
*/ */
void dma_clear_interrupt_flags(uint32_t dma, uint8_t stream, uint32_t interrupts) void dma_clear_interrupt_flags(uint32_t dma, uint8_t stream,
uint32_t interrupts)
{ {
/* Get offset to interrupt flag location in stream field */ /* Get offset to interrupt flag location in stream field */
uint32_t flags = (interrupts << DMA_ISR_OFFSET(stream)); uint32_t flags = (interrupts << DMA_ISR_OFFSET(stream));
@ -213,7 +214,8 @@ Ensure that the stream is disabled otherwise the setting will not be changed.
dma_st_perwidth. dma_st_perwidth.
*/ */
void dma_set_peripheral_size(uint32_t dma, uint8_t stream, uint32_t peripheral_size) void dma_set_peripheral_size(uint32_t dma, uint8_t stream,
uint32_t peripheral_size)
{ {
DMA_SCR(dma, stream) &= ~(DMA_SxCR_PSIZE_MASK); DMA_SCR(dma, stream) &= ~(DMA_SxCR_PSIZE_MASK);
DMA_SCR(dma, stream) |= peripheral_size; DMA_SCR(dma, stream) |= peripheral_size;

6
lib/stm32/common/gpio_common_f24.c
View File

@ -86,7 +86,8 @@ gpio_pup
If multiple pins are to be set, use bitwise OR '|' to separate If multiple pins are to be set, use bitwise OR '|' to separate
them. them.
*/ */
void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down, uint16_t gpios) void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down,
uint16_t gpios)
{ {
uint16_t i; uint16_t i;
uint32_t moder, pupd; uint32_t moder, pupd;
@ -128,7 +129,8 @@ port.
If multiple pins are to be set, use bitwise OR '|' to separate If multiple pins are to be set, use bitwise OR '|' to separate
them. them.
*/ */
void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed, uint16_t gpios) void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed,
uint16_t gpios)
{ {
uint16_t i; uint16_t i;
uint32_t ospeedr; uint32_t ospeedr;

4
lib/stm32/common/iwdg_common_all.c
View File

@ -66,8 +66,8 @@ A delay of up to 5 clock cycles of the LSI clock (about 156 microseconds)
can occasionally occur if the prescale or preload registers are currently busy can occasionally occur if the prescale or preload registers are currently busy
loading a previous value. loading a previous value.
@param[in] period uint32_t Period in milliseconds (< 32760) from a watchdog reset @param[in] period uint32_t Period in milliseconds (< 32760) from a watchdog
until a system reset is issued. reset until a system reset is issued.
*/ */
void iwdg_set_period_ms(uint32_t period) void iwdg_set_period_ms(uint32_t period)

3
lib/stm32/common/spi_common_all.c
View File

@ -119,7 +119,8 @@ spi_lsbfirst.
@returns int. Error code. @returns int. Error code.
*/ */
int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha, uint32_t dff, uint32_t lsbfirst) int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
uint32_t dff, uint32_t lsbfirst)
{ {
uint32_t reg32 = SPI_CR1(spi); uint32_t reg32 = SPI_CR1(spi);

9
lib/stm32/common/timer_common_all.c
View File

@ -1444,7 +1444,8 @@ tim_reg_base
timers 1 and 8) timers 1 and 8)
*/ */
void timer_set_oc_idle_state_set(uint32_t timer_peripheral, enum tim_oc_id oc_id) void timer_set_oc_idle_state_set(uint32_t timer_peripheral,
enum tim_oc_id oc_id)
{ {
#if (defined(TIM1_BASE) || defined(TIM8_BASE)) #if (defined(TIM1_BASE) || defined(TIM8_BASE))
/* Acting for TIM1 and TIM8 only. */ /* Acting for TIM1 and TIM8 only. */
@ -1496,7 +1497,8 @@ tim_reg_base
timers 1 and 8) timers 1 and 8)
*/ */
void timer_set_oc_idle_state_unset(uint32_t timer_peripheral, enum tim_oc_id oc_id) void timer_set_oc_idle_state_unset(uint32_t timer_peripheral,
enum tim_oc_id oc_id)
{ {
#if (defined(TIM1_BASE) || defined(TIM8_BASE)) #if (defined(TIM1_BASE) || defined(TIM8_BASE))
/* Acting for TIM1 and TIM8 only. */ /* Acting for TIM1 and TIM8 only. */
@ -1546,7 +1548,8 @@ to the compare register.
@param[in] value Unsigned int32. Compare value. @param[in] value Unsigned int32. Compare value.
*/ */
void timer_set_oc_value(uint32_t timer_peripheral, enum tim_oc_id oc_id, uint32_t value) void timer_set_oc_value(uint32_t timer_peripheral, enum tim_oc_id oc_id,
uint32_t value)
{ {
switch (oc_id) { switch (oc_id) {
case TIM_OC1: case TIM_OC1:

3
lib/stm32/f1/adc.c
View File

@ -490,7 +490,8 @@ adc_reg_base.
@param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel. @param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel.
*/ */
void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc, uint8_t channel) void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc,
uint8_t channel)
{ {
uint32_t reg32; uint32_t reg32;

6
lib/stm32/f2/rcc.c
View File

@ -338,7 +338,8 @@ void rcc_set_rtcpre(uint32_t rtcpre)
RCC_CFGR = (reg32 | (rtcpre << 16)); RCC_CFGR = (reg32 | (rtcpre << 16));
} }
void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq) void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq)
{ {
RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) | RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) |
(plln << RCC_PLLCFGR_PLLN_SHIFT) | (plln << RCC_PLLCFGR_PLLN_SHIFT) |
@ -346,7 +347,8 @@ void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t
(pllq << RCC_PLLCFGR_PLLQ_SHIFT); (pllq << RCC_PLLCFGR_PLLQ_SHIFT);
} }
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq) void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq)
{ {
RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) | RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) |
(plln << RCC_PLLCFGR_PLLN_SHIFT) | (plln << RCC_PLLCFGR_PLLN_SHIFT) |

9
lib/stm32/f4/adc.c
View File

@ -278,7 +278,8 @@ adc_enable_analog_watchdog_regular.
@param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel @param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel
*/ */
void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc, uint8_t channel) void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc,
uint8_t channel)
{ {
uint32_t reg32; uint32_t reg32;
@ -809,7 +810,8 @@ the trigger polarity is zero, triggering is disabled.
adc_trigger_polarity_regular adc_trigger_polarity_regular
*/ */
void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger, uint32_t polarity) void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger,
uint32_t polarity)
{ {
uint32_t reg32 = ADC_CR2(adc); uint32_t reg32 = ADC_CR2(adc);
@ -841,7 +843,8 @@ the polarity of the trigger event: rising or falling edge or both.
adc_trigger_polarity_injected adc_trigger_polarity_injected
*/ */
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, uint32_t polarity) void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
uint32_t polarity)
{ {
uint32_t reg32 = ADC_CR2(adc); uint32_t reg32 = ADC_CR2(adc);

6
lib/stm32/f4/rcc.c
View File

@ -455,7 +455,8 @@ void rcc_set_rtcpre(uint32_t rtcpre)
RCC_CFGR = (reg32 | (rtcpre << 16)); RCC_CFGR = (reg32 | (rtcpre << 16));
} }
void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq) void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq)
{ {
RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) | RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) |
(plln << RCC_PLLCFGR_PLLN_SHIFT) | (plln << RCC_PLLCFGR_PLLN_SHIFT) |
@ -463,7 +464,8 @@ void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t
(pllq << RCC_PLLCFGR_PLLQ_SHIFT); (pllq << RCC_PLLCFGR_PLLQ_SHIFT);
} }
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq) void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq)
{ {
RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) | RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) |
(plln << RCC_PLLCFGR_PLLN_SHIFT) | (plln << RCC_PLLCFGR_PLLN_SHIFT) |

3
lib/stm32/l1/rcc.c
View File

@ -375,7 +375,8 @@ void rcc_set_sysclk_source(uint32_t clk)
RCC_CFGR = (reg32 | clk); RCC_CFGR = (reg32 | clk);
} }
void rcc_set_pll_configuration(uint32_t source, uint32_t multiplier, uint32_t divisor) void rcc_set_pll_configuration(uint32_t source, uint32_t multiplier,
uint32_t divisor)
{ {
uint32_t reg32; uint32_t reg32;

6
lib/usb/usb.c
View File

@ -137,7 +137,8 @@ void usbd_disconnect(usbd_device *usbd_dev, bool disconnected)
} }
} }
void usbd_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size, void usbd_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
uint16_t max_size,
void (*callback)(usbd_device *usbd_dev, uint8_t ep)) void (*callback)(usbd_device *usbd_dev, uint8_t ep))
{ {
usbd_dev->driver->ep_setup(usbd_dev, addr, type, max_size, callback); usbd_dev->driver->ep_setup(usbd_dev, addr, type, max_size, callback);
@ -149,7 +150,8 @@ uint16_t usbd_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
return usbd_dev->driver->ep_write_packet(usbd_dev, addr, buf, len); return usbd_dev->driver->ep_write_packet(usbd_dev, addr, buf, len);
} }
uint16_t usbd_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t len) uint16_t usbd_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf,
uint16_t len)
{ {
return usbd_dev->driver->ep_read_packet(usbd_dev, addr, buf, len); return usbd_dev->driver->ep_read_packet(usbd_dev, addr, buf, len);
} }

3
lib/usb/usb_control.c
View File

@ -40,7 +40,8 @@ LGPL License Terms @ref lgpl_license
#include "usb_private.h" #include "usb_private.h"
/* Register application callback function for handling USB control requests. */ /* Register application callback function for handling USB control requests. */
int usbd_register_control_callback(usbd_device *usbd_dev, uint8_t type, uint8_t type_mask, int usbd_register_control_callback(usbd_device *usbd_dev, uint8_t type,
uint8_t type_mask,
usbd_control_callback callback) usbd_control_callback callback)
{ {
int i; int i;

27
lib/usb/usb_f103.c
View File

@ -26,17 +26,20 @@
static usbd_device *stm32f103_usbd_init(void); static usbd_device *stm32f103_usbd_init(void);
static void stm32f103_set_address(usbd_device *usbd_dev, uint8_t addr); static void stm32f103_set_address(usbd_device *usbd_dev, uint8_t addr);
static void stm32f103_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, static void stm32f103_ep_setup(usbd_device *usbd_dev, uint8_t addr,
uint16_t max_size, uint8_t type, uint16_t max_size,
void (*callback) (usbd_device *usbd_dev, uint8_t ep)); void (*callback) (usbd_device *usbd_dev,
uint8_t ep));
static void stm32f103_endpoints_reset(usbd_device *usbd_dev); static void stm32f103_endpoints_reset(usbd_device *usbd_dev);
static void stm32f103_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall); static void stm32f103_ep_stall_set(usbd_device *usbd_dev, uint8_t addr,
uint8_t stall);
static uint8_t stm32f103_ep_stall_get(usbd_device *usbd_dev, uint8_t addr); static uint8_t stm32f103_ep_stall_get(usbd_device *usbd_dev, uint8_t addr);
static void stm32f103_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak); static void stm32f103_ep_nak_set(usbd_device *usbd_dev, uint8_t addr,
uint8_t nak);
static uint16_t stm32f103_ep_write_packet(usbd_device *usbd_dev, uint8_t addr, static uint16_t stm32f103_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
const void *buf, uint16_t len); const void *buf, uint16_t len);
static uint16_t stm32f103_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, static uint16_t stm32f103_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
uint16_t len); void *buf, uint16_t len);
static void stm32f103_poll(usbd_device *usbd_dev); static void stm32f103_poll(usbd_device *usbd_dev);
static uint8_t force_nak[8]; static uint8_t force_nak[8];
@ -100,7 +103,8 @@ static void usb_set_ep_rx_bufsize(usbd_device *dev, uint8_t ep, uint32_t size)
static void stm32f103_ep_setup(usbd_device *dev, uint8_t addr, uint8_t type, static void stm32f103_ep_setup(usbd_device *dev, uint8_t addr, uint8_t type,
uint16_t max_size, uint16_t max_size,
void (*callback) (usbd_device *usbd_dev, uint8_t ep)) void (*callback) (usbd_device *usbd_dev,
uint8_t ep))
{ {
/* Translate USB standard type codes to STM32. */ /* Translate USB standard type codes to STM32. */
const uint16_t typelookup[] = { const uint16_t typelookup[] = {
@ -152,7 +156,8 @@ static void stm32f103_endpoints_reset(usbd_device *dev)
dev->pm_top = 0x40 + (2 * dev->desc->bMaxPacketSize0); dev->pm_top = 0x40 + (2 * dev->desc->bMaxPacketSize0);
} }
static void stm32f103_ep_stall_set(usbd_device *dev, uint8_t addr, uint8_t stall) static void stm32f103_ep_stall_set(usbd_device *dev, uint8_t addr,
uint8_t stall)
{ {
(void)dev; (void)dev;
if (addr == 0) { if (addr == 0) {
@ -269,8 +274,8 @@ static void usb_copy_from_pm(void *buf, const volatile void *vPM, uint16_t len)
} }
} }
static uint16_t stm32f103_ep_read_packet(usbd_device *dev, uint8_t addr, void *buf, static uint16_t stm32f103_ep_read_packet(usbd_device *dev, uint8_t addr,
uint16_t len) void *buf, uint16_t len)
{ {
(void)dev; (void)dev;
if ((*USB_EP_REG(addr) & USB_EP_RX_STAT) == USB_EP_RX_STAT_VALID) { if ((*USB_EP_REG(addr) & USB_EP_RX_STAT) == USB_EP_RX_STAT_VALID) {

14
lib/usb/usb_fx07_common.c
View File

@ -31,15 +31,17 @@
* according to the selected cores base address. */ * according to the selected cores base address. */
#define dev_base_address (usbd_dev->driver->base_address) #define dev_base_address (usbd_dev->driver->base_address)
#define REBASE(x) MMIO32((x)+(dev_base_address)) #define REBASE(x) MMIO32((x)+(dev_base_address))
#define REBASE_FIFO(x) ((volatile uint32_t*)((dev_base_address) + (OTG_FIFO(x)))) #define REBASE_FIFO(x) ((volatile uint32_t*)((dev_base_address) \
+ (OTG_FIFO(x))))
void stm32fx07_set_address(usbd_device *usbd_dev, uint8_t addr) void stm32fx07_set_address(usbd_device *usbd_dev, uint8_t addr)
{ {
REBASE(OTG_DCFG) = (REBASE(OTG_DCFG) & ~OTG_FS_DCFG_DAD) | (addr << 4); REBASE(OTG_DCFG) = (REBASE(OTG_DCFG) & ~OTG_FS_DCFG_DAD) | (addr << 4);
} }
void stm32fx07_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size, void stm32fx07_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
void (*callback) (usbd_device *usbd_dev, uint8_t ep)) uint16_t max_size,
void (*callback) (usbd_device *usbd_dev, uint8_t ep))
{ {
/* /*
* Configure endpoint address and type. Allocate FIFO memory for * Configure endpoint address and type. Allocate FIFO memory for
@ -204,7 +206,8 @@ uint16_t stm32fx07_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
return len; return len;
} }
uint16_t stm32fx07_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t len) uint16_t stm32fx07_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
void *buf, uint16_t len)
{ {
int i; int i;
uint32_t *buf32 = buf; uint32_t *buf32 = buf;
@ -294,7 +297,8 @@ void stm32fx07_poll(usbd_device *usbd_dev)
for (i = 0; i < 4; i++) { /* Iterate over endpoints. */ for (i = 0; i < 4; i++) { /* Iterate over endpoints. */
if (REBASE(OTG_DIEPINT(i)) & OTG_FS_DIEPINTX_XFRC) { if (REBASE(OTG_DIEPINT(i)) & OTG_FS_DIEPINTX_XFRC) {
/* Transfer complete. */ /* Transfer complete. */
if (usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN]) { if (usbd_dev->user_callback_ctr[i]
[USB_TRANSACTION_IN]) {
usbd_dev->user_callback_ctr[i] usbd_dev->user_callback_ctr[i]
[USB_TRANSACTION_IN](usbd_dev, i); [USB_TRANSACTION_IN](usbd_dev, i);
} }

13
lib/usb/usb_fx07_common.h
View File

@ -21,16 +21,17 @@
#define __USB_FX07_COMMON_H_ #define __USB_FX07_COMMON_H_
void stm32fx07_set_address(usbd_device *usbd_dev, uint8_t addr); void stm32fx07_set_address(usbd_device *usbd_dev, uint8_t addr);
void stm32fx07_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size, void stm32fx07_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
void (*callback)(usbd_device *usbd_dev, uint8_t ep)); uint16_t max_size,
void (*callback)(usbd_device *usbd_dev, uint8_t ep));
void stm32fx07_endpoints_reset(usbd_device *usbd_dev); void stm32fx07_endpoints_reset(usbd_device *usbd_dev);
void stm32fx07_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall); void stm32fx07_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall);
uint8_t stm32fx07_ep_stall_get(usbd_device *usbd_dev, uint8_t addr); uint8_t stm32fx07_ep_stall_get(usbd_device *usbd_dev, uint8_t addr);
void stm32fx07_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak); void stm32fx07_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak);
uint16_t stm32fx07_ep_write_packet(usbd_device *usbd_dev, uint8_t addr, const void *buf, uint16_t stm32fx07_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
uint16_t len); const void *buf, uint16_t len);
uint16_t stm32fx07_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t stm32fx07_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
uint16_t len); void *buf, uint16_t len);
void stm32fx07_poll(usbd_device *usbd_dev); void stm32fx07_poll(usbd_device *usbd_dev);
void stm32fx07_disconnect(usbd_device *usbd_dev, bool disconnected); void stm32fx07_disconnect(usbd_device *usbd_dev, bool disconnected);

20
lib/usb/usb_private.h
View File

@ -6,7 +6,8 @@
@version 1.0.0 @version 1.0.0
@author @htmlonly &copy; @endhtmlonly 2010 Gareth McMullin <gareth@blacksphere.co.nz> @author @htmlonly &copy; @endhtmlonly 2010
Gareth McMullin <gareth@blacksphere.co.nz>
@date 10 March 2013 @date 10 March 2013
@ -84,7 +85,8 @@ struct _usbd_device {
void (*user_callback_ctr[8][3])(usbd_device *usbd_dev, uint8_t ea); void (*user_callback_ctr[8][3])(usbd_device *usbd_dev, uint8_t ea);
/* User callback function for some standard USB function hooks */ /* User callback function for some standard USB function hooks */
void (*user_callback_set_config)(usbd_device *usbd_dev, uint16_t wValue); void (*user_callback_set_config)(usbd_device *usbd_dev,
uint16_t wValue);
const struct _usbd_driver *driver; const struct _usbd_driver *driver;
@ -137,16 +139,18 @@ void _usbd_reset(usbd_device *usbd_dev);
struct _usbd_driver { struct _usbd_driver {
usbd_device *(*init)(void); usbd_device *(*init)(void);
void (*set_address)(usbd_device *usbd_dev, uint8_t addr); void (*set_address)(usbd_device *usbd_dev, uint8_t addr);
void (*ep_setup)(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size, void (*ep_setup)(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
uint16_t max_size,
void (*cb)(usbd_device *usbd_dev, uint8_t ep)); void (*cb)(usbd_device *usbd_dev, uint8_t ep));
void (*ep_reset)(usbd_device *usbd_dev); void (*ep_reset)(usbd_device *usbd_dev);
void (*ep_stall_set)(usbd_device *usbd_dev, uint8_t addr, uint8_t stall); void (*ep_stall_set)(usbd_device *usbd_dev, uint8_t addr,
uint8_t stall);
void (*ep_nak_set)(usbd_device *usbd_dev, uint8_t addr, uint8_t nak); void (*ep_nak_set)(usbd_device *usbd_dev, uint8_t addr, uint8_t nak);
uint8_t (*ep_stall_get)(usbd_device *usbd_dev, uint8_t addr); uint8_t (*ep_stall_get)(usbd_device *usbd_dev, uint8_t addr);
uint16_t (*ep_write_packet)(usbd_device *usbd_dev, uint8_t addr, const void *buf, uint16_t (*ep_write_packet)(usbd_device *usbd_dev, uint8_t addr,
uint16_t len); const void *buf, uint16_t len);
uint16_t (*ep_read_packet)(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t (*ep_read_packet)(usbd_device *usbd_dev, uint8_t addr,
uint16_t len); void *buf, uint16_t len);
void (*poll)(usbd_device *usbd_dev); void (*poll)(usbd_device *usbd_dev);
void (*disconnect)(usbd_device *usbd_dev, bool disconnected); void (*disconnect)(usbd_device *usbd_dev, bool disconnected);
uint32_t base_address; uint32_t base_address;

8
lib/usb/usb_standard.c
View File

@ -377,8 +377,8 @@ int _usbd_standard_request_device(usbd_device *usbd_dev,
struct usb_setup_data *req, uint8_t **buf, struct usb_setup_data *req, uint8_t **buf,
uint16_t *len) uint16_t *len)
{ {
int (*command)(usbd_device *usbd_dev, struct usb_setup_data *req, uint8_t int (*command)(usbd_device *usbd_dev, struct usb_setup_data *req,
**buf, uint16_t *len) = NULL; uint8_t **buf, uint16_t *len) = NULL;
switch (req->bRequest) { switch (req->bRequest) {
case USB_REQ_CLEAR_FEATURE: case USB_REQ_CLEAR_FEATURE:
@ -494,8 +494,8 @@ int _usbd_standard_request_endpoint(usbd_device *usbd_dev,
return command(usbd_dev, req, buf, len); return command(usbd_dev, req, buf, len);
} }
int _usbd_standard_request(usbd_device *usbd_dev, int _usbd_standard_request(usbd_device *usbd_dev, struct usb_setup_data *req,
struct usb_setup_data *req, uint8_t **buf, uint16_t *len) uint8_t **buf, uint16_t *len)
{ {
/* FIXME: Have class/vendor requests as well. */ /* FIXME: Have class/vendor requests as well. */
if ((req->bmRequestType & USB_REQ_TYPE_TYPE) != USB_REQ_TYPE_STANDARD) { if ((req->bmRequestType & USB_REQ_TYPE_TYPE) != USB_REQ_TYPE_STANDARD) {