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STM32F4-7: add DAC_SR status bits

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Include the DAC_SR register and it's bits.  Arguably this should be jsut
included in the common_all file.
This commit is contained in:
vector 2019-05-07 18:29:48 +02:00 committed by Karl Palsson
parent 5dbdb255d8
commit 486446e1db
2 changed files with 29 additions and 0 deletions
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16
include/libopencm3/stm32/f4/dac.h
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@ -33,5 +33,21 @@ LGPL License Terms @ref lgpl_license
#include <libopencm3/stm32/common/dac_common_all.h>
/** DAC status register (DAC_SR).
* not available on STM32F4x1/STM32F4x2 */
#define DAC_SR MMIO32(DAC_BASE + 0x34)
/* --- DAC_SR values ------------------------------------------------------- */
/** DMAUDR2: DAC channel 1 DMA underrun flag */
#define DAC_SR_DMAUDR1 (1 << 13)
/** DMAUDR2: DAC channel 2 DMA underrun flag.
* not available on STM32F4x1/STM32F4x2 and STM32F410*/
#define DAC_SR_DMAUDR2 (1 << 29)
#endif

13
include/libopencm3/stm32/f7/dac.h
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@ -33,5 +33,18 @@ LGPL License Terms @ref lgpl_license
#include <libopencm3/stm32/common/dac_common_all.h>
/** DAC status register (DAC_SR) */
#define DAC_SR MMIO32(DAC_BASE + 0x34)
/* --- DAC_SR values ------------------------------------------------------- */
/** DMAUDR1: DAC channel 1 DMA underrun flag */
#define DAC_SR_DMAUDR1 (1 << 13)
/** DMAUDR2: DAC channel 2 DMA underrun flag */
#define DAC_SR_DMAUDR2 (1 << 29)
#endif