This commit is contained in:
Michael Ossmann 2012-09-29 22:01:52 -06:00 committed by Piotr Esden-Tempski
parent 7b0cc0c6a3
commit 56361f7123

View File

@ -0,0 +1,359 @@
CCU1_PM,0,1,PD,Initiate power-down mode,0,rw
CCU1_BASE_STAT,0,1,BASE_APB3_CLK_IND,Base clock indicator for BASE_APB3_CLK,1,r
CCU1_BASE_STAT,1,1,BASE_APB1_CLK_IND,Base clock indicator for BASE_APB1_CLK,1,r
CCU1_BASE_STAT,2,1,BASE_SPIFI_CLK_IND,Base clock indicator for BASE_SPIFI_CLK,1,r
CCU1_BASE_STAT,3,1,BASE_M4_CLK_IND,Base clock indicator for BASE_M4_CLK,1,r
CCU1_BASE_STAT,6,1,BASE_PERIPH_CLK_IND,Base clock indicator for BASE_PERIPH_CLK,1,r
CCU1_BASE_STAT,7,1,BASE_USB0_CLK_IND,Base clock indicator for BASE_USB0_CLK,1,r
CCU1_BASE_STAT,8,1,BASE_USB1_CLK_IND,Base clock indicator for BASE_USB1_CLK,1,r
CCU1_BASE_STAT,9,1,BASE_SPI_CLK_IND,Base clock indicator for BASE_SPI_CLK,1,r
CCU1_CLK_APB3_BUS_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB3_BUS_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB3_BUS_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB3_BUS_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB3_BUS_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB3_BUS_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB3_I2C1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB3_I2C1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB3_I2C1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB3_I2C1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB3_I2C1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB3_I2C1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB3_DAC_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB3_DAC_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB3_DAC_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB3_DAC_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB3_DAC_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB3_DAC_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB3_ADC0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB3_ADC0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB3_ADC0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB3_ADC0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB3_ADC0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB3_ADC0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB3_ADC1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB3_ADC1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB3_ADC1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB3_ADC1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB3_ADC1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB3_ADC1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB3_CAN0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB3_CAN0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB3_CAN0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB3_CAN0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB3_CAN0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB3_CAN0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB1_BUS_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB1_BUS_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB1_BUS_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB1_BUS_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB1_BUS_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB1_BUS_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB1_MOTOCONPWM_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB1_MOTOCONPWM_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB1_MOTOCONPWM_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB1_MOTOCONPWM_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB1_MOTOCONPWM_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB1_MOTOCONPWM_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB1_I2C0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB1_I2C0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB1_I2C0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB1_I2C0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB1_I2C0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB1_I2C0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB1_I2S_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB1_I2S_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB1_I2S_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB1_I2S_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB1_I2S_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB1_I2S_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_APB1_CAN1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_APB1_CAN1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_APB1_CAN1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_APB1_CAN1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_APB1_CAN1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_APB1_CAN1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_SPIFI_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_SPIFI_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_SPIFI_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_SPIFI_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_SPIFI_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_SPIFI_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_BUS_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_BUS_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_BUS_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_BUS_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_BUS_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_BUS_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_SPIFI_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_SPIFI_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_SPIFI_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_SPIFI_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_SPIFI_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_SPIFI_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_GPIO_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_GPIO_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_GPIO_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_GPIO_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_GPIO_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_GPIO_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_LCD_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_LCD_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_LCD_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_LCD_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_LCD_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_LCD_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_ETHERNET_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_ETHERNET_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_ETHERNET_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_ETHERNET_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_ETHERNET_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_ETHERNET_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_USB0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_USB0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_USB0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_USB0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_USB0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_USB0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_EMC_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_EMC_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_EMC_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_EMC_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_EMC_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_EMC_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_SDIO_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_SDIO_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_SDIO_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_SDIO_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_SDIO_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_SDIO_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_DMA_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_DMA_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_DMA_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_DMA_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_DMA_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_DMA_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_M4CORE_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_M4CORE_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_M4CORE_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_M4CORE_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_M4CORE_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_M4CORE_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_SCT_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_SCT_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_SCT_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_SCT_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_SCT_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_SCT_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_USB1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_USB1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_USB1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_USB1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_USB1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_USB1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_EMCDIV_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_EMCDIV_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_EMCDIV_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_EMCDIV_CFG,5,3,DIV,Clock divider value,0,rw
CCU1_CLK_M4_EMCDIV_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_EMCDIV_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_EMCDIV_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_M0APP_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_M0APP_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_M0APP_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_M0APP_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_M0APP_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_M0APP_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_VADC_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_VADC_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_VADC_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_VADC_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_VADC_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_VADC_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_WWDT_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_WWDT_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_WWDT_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_WWDT_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_WWDT_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_WWDT_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_USART0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_USART0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_USART0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_USART0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_USART0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_USART0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_UART1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_UART1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_UART1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_UART1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_UART1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_UART1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_SSP0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_SSP0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_SSP0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_SSP0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_SSP0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_SSP0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_TIMER0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_TIMER0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_TIMER0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_TIMER0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_TIMER0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_TIMER0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_TIMER1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_TIMER1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_TIMER1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_TIMER1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_TIMER1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_TIMER1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_SCU_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_SCU_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_SCU_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_SCU_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_SCU_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_SCU_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_CREG_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_CREG_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_CREG_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_CREG_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_CREG_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_CREG_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_RITIMER_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_RITIMER_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_RITIMER_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_RITIMER_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_RITIMER_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_RITIMER_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_USART2_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_USART2_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_USART2_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_USART2_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_USART2_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_USART2_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_USART3_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_USART3_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_USART3_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_USART3_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_USART3_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_USART3_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_TIMER2_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_TIMER2_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_TIMER2_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_TIMER2_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_TIMER2_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_TIMER2_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_TIMER3_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_TIMER3_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_TIMER3_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_TIMER3_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_TIMER3_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_TIMER3_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_SSP1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_SSP1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_SSP1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_SSP1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_SSP1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_SSP1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_M4_QEI_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_M4_QEI_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_M4_QEI_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_M4_QEI_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_M4_QEI_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_M4_QEI_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_PERIPH_BUS_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_PERIPH_BUS_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_PERIPH_BUS_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_PERIPH_BUS_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_PERIPH_BUS_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_PERIPH_BUS_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_PERIPH_CORE_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_PERIPH_CORE_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_PERIPH_CORE_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_PERIPH_CORE_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_PERIPH_CORE_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_PERIPH_CORE_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_PERIPH_SGPIO_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_PERIPH_SGPIO_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_PERIPH_SGPIO_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_PERIPH_SGPIO_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_PERIPH_SGPIO_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_PERIPH_SGPIO_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_USB0_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_USB0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_USB0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_USB0_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_USB0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_USB0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_USB1_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_USB1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_USB1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_USB1_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_USB1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_USB1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_SPI_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_SPI_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_SPI_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_SPI_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_SPI_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_SPI_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU1_CLK_VADC_CFG,0,1,RUN,Run enable,1,rw
CCU1_CLK_VADC_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU1_CLK_VADC_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU1_CLK_VADC_STAT,0,1,RUN,Run enable status,1,r
CCU1_CLK_VADC_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU1_CLK_VADC_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_PM,0,1,PD,Initiate power-down mode,0,rw
CCU2_BASE_STAT,1,1,BASE_UART3_CLK_IND,Base clock indicator for BASE_UART3_CLK,1,r
CCU2_BASE_STAT,2,1,BASE_UART2_CLK_IND,Base clock indicator for BASE_UART2_CLK,1,r
CCU2_BASE_STAT,3,1,BASE_UART1_CLK_IND,Base clock indicator for BASE_UART1_CLK,1,r
CCU2_BASE_STAT,4,1,BASE_UART0_CLK_IND,Base clock indicator for BASE_UART0_CLK,1,r
CCU2_BASE_STAT,5,1,BASE_SSP1_CLK_IND,Base clock indicator for BASE_SSP1_CLK,1,r
CCU2_BASE_STAT,6,1,BASE_SSP0_CLK_IND,Base clock indicator for BASE_SSP0_CLK,1,r
CCU2_CLK_APLL_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APLL_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APLL_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APLL_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APLL_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APLL_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_APB2_USART3_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APB2_USART3_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APB2_USART3_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APB2_USART3_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APB2_USART3_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APB2_USART3_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_APB2_USART2_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APB2_USART2_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APB2_USART2_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APB2_USART2_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APB2_USART2_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APB2_USART2_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_APB0_UART1_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APB0_UART1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APB0_UART1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APB0_UART1_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APB0_UART1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APB0_UART1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_APB0_USART0_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APB0_USART0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APB0_USART0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APB0_USART0_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APB0_USART0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APB0_USART0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_APB2_SSP1_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APB2_SSP1_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APB2_SSP1_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APB2_SSP1_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APB2_SSP1_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APB2_SSP1_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_APB0_SSP0_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_APB0_SSP0_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_APB0_SSP0_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_APB0_SSP0_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_APB0_SSP0_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_APB0_SSP0_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
CCU2_CLK_SDIO_CFG,0,1,RUN,Run enable,1,rw
CCU2_CLK_SDIO_CFG,1,1,AUTO,Auto (AHB disable mechanism) enable,0,rw
CCU2_CLK_SDIO_CFG,2,1,WAKEUP,Wake-up mechanism enable,0,rw
CCU2_CLK_SDIO_STAT,0,1,RUN,Run enable status,1,r
CCU2_CLK_SDIO_STAT,1,1,AUTO,Auto (AHB disable mechanism) enable status,0,r
CCU2_CLK_SDIO_STAT,2,1,WAKEUP,Wake-up mechanism enable status,0,r
1 CCU1_PM 0 1 PD Initiate power-down mode 0 rw
2 CCU1_BASE_STAT 0 1 BASE_APB3_CLK_IND Base clock indicator for BASE_APB3_CLK 1 r
3 CCU1_BASE_STAT 1 1 BASE_APB1_CLK_IND Base clock indicator for BASE_APB1_CLK 1 r
4 CCU1_BASE_STAT 2 1 BASE_SPIFI_CLK_IND Base clock indicator for BASE_SPIFI_CLK 1 r
5 CCU1_BASE_STAT 3 1 BASE_M4_CLK_IND Base clock indicator for BASE_M4_CLK 1 r
6 CCU1_BASE_STAT 6 1 BASE_PERIPH_CLK_IND Base clock indicator for BASE_PERIPH_CLK 1 r
7 CCU1_BASE_STAT 7 1 BASE_USB0_CLK_IND Base clock indicator for BASE_USB0_CLK 1 r
8 CCU1_BASE_STAT 8 1 BASE_USB1_CLK_IND Base clock indicator for BASE_USB1_CLK 1 r
9 CCU1_BASE_STAT 9 1 BASE_SPI_CLK_IND Base clock indicator for BASE_SPI_CLK 1 r
10 CCU1_CLK_APB3_BUS_CFG 0 1 RUN Run enable 1 rw
11 CCU1_CLK_APB3_BUS_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
12 CCU1_CLK_APB3_BUS_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
13 CCU1_CLK_APB3_BUS_STAT 0 1 RUN Run enable status 1 r
14 CCU1_CLK_APB3_BUS_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
15 CCU1_CLK_APB3_BUS_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
16 CCU1_CLK_APB3_I2C1_CFG 0 1 RUN Run enable 1 rw
17 CCU1_CLK_APB3_I2C1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
18 CCU1_CLK_APB3_I2C1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
19 CCU1_CLK_APB3_I2C1_STAT 0 1 RUN Run enable status 1 r
20 CCU1_CLK_APB3_I2C1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
21 CCU1_CLK_APB3_I2C1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
22 CCU1_CLK_APB3_DAC_CFG 0 1 RUN Run enable 1 rw
23 CCU1_CLK_APB3_DAC_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
24 CCU1_CLK_APB3_DAC_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
25 CCU1_CLK_APB3_DAC_STAT 0 1 RUN Run enable status 1 r
26 CCU1_CLK_APB3_DAC_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
27 CCU1_CLK_APB3_DAC_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
28 CCU1_CLK_APB3_ADC0_CFG 0 1 RUN Run enable 1 rw
29 CCU1_CLK_APB3_ADC0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
30 CCU1_CLK_APB3_ADC0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
31 CCU1_CLK_APB3_ADC0_STAT 0 1 RUN Run enable status 1 r
32 CCU1_CLK_APB3_ADC0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
33 CCU1_CLK_APB3_ADC0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
34 CCU1_CLK_APB3_ADC1_CFG 0 1 RUN Run enable 1 rw
35 CCU1_CLK_APB3_ADC1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
36 CCU1_CLK_APB3_ADC1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
37 CCU1_CLK_APB3_ADC1_STAT 0 1 RUN Run enable status 1 r
38 CCU1_CLK_APB3_ADC1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
39 CCU1_CLK_APB3_ADC1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
40 CCU1_CLK_APB3_CAN0_CFG 0 1 RUN Run enable 1 rw
41 CCU1_CLK_APB3_CAN0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
42 CCU1_CLK_APB3_CAN0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
43 CCU1_CLK_APB3_CAN0_STAT 0 1 RUN Run enable status 1 r
44 CCU1_CLK_APB3_CAN0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
45 CCU1_CLK_APB3_CAN0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
46 CCU1_CLK_APB1_BUS_CFG 0 1 RUN Run enable 1 rw
47 CCU1_CLK_APB1_BUS_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
48 CCU1_CLK_APB1_BUS_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
49 CCU1_CLK_APB1_BUS_STAT 0 1 RUN Run enable status 1 r
50 CCU1_CLK_APB1_BUS_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
51 CCU1_CLK_APB1_BUS_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
52 CCU1_CLK_APB1_MOTOCONPWM_CFG 0 1 RUN Run enable 1 rw
53 CCU1_CLK_APB1_MOTOCONPWM_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
54 CCU1_CLK_APB1_MOTOCONPWM_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
55 CCU1_CLK_APB1_MOTOCONPWM_STAT 0 1 RUN Run enable status 1 r
56 CCU1_CLK_APB1_MOTOCONPWM_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
57 CCU1_CLK_APB1_MOTOCONPWM_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
58 CCU1_CLK_APB1_I2C0_CFG 0 1 RUN Run enable 1 rw
59 CCU1_CLK_APB1_I2C0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
60 CCU1_CLK_APB1_I2C0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
61 CCU1_CLK_APB1_I2C0_STAT 0 1 RUN Run enable status 1 r
62 CCU1_CLK_APB1_I2C0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
63 CCU1_CLK_APB1_I2C0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
64 CCU1_CLK_APB1_I2S_CFG 0 1 RUN Run enable 1 rw
65 CCU1_CLK_APB1_I2S_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
66 CCU1_CLK_APB1_I2S_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
67 CCU1_CLK_APB1_I2S_STAT 0 1 RUN Run enable status 1 r
68 CCU1_CLK_APB1_I2S_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
69 CCU1_CLK_APB1_I2S_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
70 CCU1_CLK_APB1_CAN1_CFG 0 1 RUN Run enable 1 rw
71 CCU1_CLK_APB1_CAN1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
72 CCU1_CLK_APB1_CAN1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
73 CCU1_CLK_APB1_CAN1_STAT 0 1 RUN Run enable status 1 r
74 CCU1_CLK_APB1_CAN1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
75 CCU1_CLK_APB1_CAN1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
76 CCU1_CLK_SPIFI_CFG 0 1 RUN Run enable 1 rw
77 CCU1_CLK_SPIFI_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
78 CCU1_CLK_SPIFI_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
79 CCU1_CLK_SPIFI_STAT 0 1 RUN Run enable status 1 r
80 CCU1_CLK_SPIFI_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
81 CCU1_CLK_SPIFI_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
82 CCU1_CLK_M4_BUS_CFG 0 1 RUN Run enable 1 rw
83 CCU1_CLK_M4_BUS_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
84 CCU1_CLK_M4_BUS_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
85 CCU1_CLK_M4_BUS_STAT 0 1 RUN Run enable status 1 r
86 CCU1_CLK_M4_BUS_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
87 CCU1_CLK_M4_BUS_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
88 CCU1_CLK_M4_SPIFI_CFG 0 1 RUN Run enable 1 rw
89 CCU1_CLK_M4_SPIFI_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
90 CCU1_CLK_M4_SPIFI_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
91 CCU1_CLK_M4_SPIFI_STAT 0 1 RUN Run enable status 1 r
92 CCU1_CLK_M4_SPIFI_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
93 CCU1_CLK_M4_SPIFI_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
94 CCU1_CLK_M4_GPIO_CFG 0 1 RUN Run enable 1 rw
95 CCU1_CLK_M4_GPIO_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
96 CCU1_CLK_M4_GPIO_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
97 CCU1_CLK_M4_GPIO_STAT 0 1 RUN Run enable status 1 r
98 CCU1_CLK_M4_GPIO_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
99 CCU1_CLK_M4_GPIO_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
100 CCU1_CLK_M4_LCD_CFG 0 1 RUN Run enable 1 rw
101 CCU1_CLK_M4_LCD_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
102 CCU1_CLK_M4_LCD_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
103 CCU1_CLK_M4_LCD_STAT 0 1 RUN Run enable status 1 r
104 CCU1_CLK_M4_LCD_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
105 CCU1_CLK_M4_LCD_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
106 CCU1_CLK_M4_ETHERNET_CFG 0 1 RUN Run enable 1 rw
107 CCU1_CLK_M4_ETHERNET_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
108 CCU1_CLK_M4_ETHERNET_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
109 CCU1_CLK_M4_ETHERNET_STAT 0 1 RUN Run enable status 1 r
110 CCU1_CLK_M4_ETHERNET_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
111 CCU1_CLK_M4_ETHERNET_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
112 CCU1_CLK_M4_USB0_CFG 0 1 RUN Run enable 1 rw
113 CCU1_CLK_M4_USB0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
114 CCU1_CLK_M4_USB0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
115 CCU1_CLK_M4_USB0_STAT 0 1 RUN Run enable status 1 r
116 CCU1_CLK_M4_USB0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
117 CCU1_CLK_M4_USB0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
118 CCU1_CLK_M4_EMC_CFG 0 1 RUN Run enable 1 rw
119 CCU1_CLK_M4_EMC_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
120 CCU1_CLK_M4_EMC_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
121 CCU1_CLK_M4_EMC_STAT 0 1 RUN Run enable status 1 r
122 CCU1_CLK_M4_EMC_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
123 CCU1_CLK_M4_EMC_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
124 CCU1_CLK_M4_SDIO_CFG 0 1 RUN Run enable 1 rw
125 CCU1_CLK_M4_SDIO_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
126 CCU1_CLK_M4_SDIO_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
127 CCU1_CLK_M4_SDIO_STAT 0 1 RUN Run enable status 1 r
128 CCU1_CLK_M4_SDIO_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
129 CCU1_CLK_M4_SDIO_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
130 CCU1_CLK_M4_DMA_CFG 0 1 RUN Run enable 1 rw
131 CCU1_CLK_M4_DMA_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
132 CCU1_CLK_M4_DMA_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
133 CCU1_CLK_M4_DMA_STAT 0 1 RUN Run enable status 1 r
134 CCU1_CLK_M4_DMA_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
135 CCU1_CLK_M4_DMA_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
136 CCU1_CLK_M4_M4CORE_CFG 0 1 RUN Run enable 1 rw
137 CCU1_CLK_M4_M4CORE_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
138 CCU1_CLK_M4_M4CORE_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
139 CCU1_CLK_M4_M4CORE_STAT 0 1 RUN Run enable status 1 r
140 CCU1_CLK_M4_M4CORE_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
141 CCU1_CLK_M4_M4CORE_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
142 CCU1_CLK_M4_SCT_CFG 0 1 RUN Run enable 1 rw
143 CCU1_CLK_M4_SCT_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
144 CCU1_CLK_M4_SCT_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
145 CCU1_CLK_M4_SCT_STAT 0 1 RUN Run enable status 1 r
146 CCU1_CLK_M4_SCT_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
147 CCU1_CLK_M4_SCT_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
148 CCU1_CLK_M4_USB1_CFG 0 1 RUN Run enable 1 rw
149 CCU1_CLK_M4_USB1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
150 CCU1_CLK_M4_USB1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
151 CCU1_CLK_M4_USB1_STAT 0 1 RUN Run enable status 1 r
152 CCU1_CLK_M4_USB1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
153 CCU1_CLK_M4_USB1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
154 CCU1_CLK_M4_EMCDIV_CFG 0 1 RUN Run enable 1 rw
155 CCU1_CLK_M4_EMCDIV_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
156 CCU1_CLK_M4_EMCDIV_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
157 CCU1_CLK_M4_EMCDIV_CFG 5 3 DIV Clock divider value 0 rw
158 CCU1_CLK_M4_EMCDIV_STAT 0 1 RUN Run enable status 1 r
159 CCU1_CLK_M4_EMCDIV_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
160 CCU1_CLK_M4_EMCDIV_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
161 CCU1_CLK_M4_M0APP_CFG 0 1 RUN Run enable 1 rw
162 CCU1_CLK_M4_M0APP_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
163 CCU1_CLK_M4_M0APP_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
164 CCU1_CLK_M4_M0APP_STAT 0 1 RUN Run enable status 1 r
165 CCU1_CLK_M4_M0APP_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
166 CCU1_CLK_M4_M0APP_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
167 CCU1_CLK_M4_VADC_CFG 0 1 RUN Run enable 1 rw
168 CCU1_CLK_M4_VADC_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
169 CCU1_CLK_M4_VADC_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
170 CCU1_CLK_M4_VADC_STAT 0 1 RUN Run enable status 1 r
171 CCU1_CLK_M4_VADC_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
172 CCU1_CLK_M4_VADC_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
173 CCU1_CLK_M4_WWDT_CFG 0 1 RUN Run enable 1 rw
174 CCU1_CLK_M4_WWDT_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
175 CCU1_CLK_M4_WWDT_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
176 CCU1_CLK_M4_WWDT_STAT 0 1 RUN Run enable status 1 r
177 CCU1_CLK_M4_WWDT_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
178 CCU1_CLK_M4_WWDT_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
179 CCU1_CLK_M4_USART0_CFG 0 1 RUN Run enable 1 rw
180 CCU1_CLK_M4_USART0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
181 CCU1_CLK_M4_USART0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
182 CCU1_CLK_M4_USART0_STAT 0 1 RUN Run enable status 1 r
183 CCU1_CLK_M4_USART0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
184 CCU1_CLK_M4_USART0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
185 CCU1_CLK_M4_UART1_CFG 0 1 RUN Run enable 1 rw
186 CCU1_CLK_M4_UART1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
187 CCU1_CLK_M4_UART1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
188 CCU1_CLK_M4_UART1_STAT 0 1 RUN Run enable status 1 r
189 CCU1_CLK_M4_UART1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
190 CCU1_CLK_M4_UART1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
191 CCU1_CLK_M4_SSP0_CFG 0 1 RUN Run enable 1 rw
192 CCU1_CLK_M4_SSP0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
193 CCU1_CLK_M4_SSP0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
194 CCU1_CLK_M4_SSP0_STAT 0 1 RUN Run enable status 1 r
195 CCU1_CLK_M4_SSP0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
196 CCU1_CLK_M4_SSP0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
197 CCU1_CLK_M4_TIMER0_CFG 0 1 RUN Run enable 1 rw
198 CCU1_CLK_M4_TIMER0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
199 CCU1_CLK_M4_TIMER0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
200 CCU1_CLK_M4_TIMER0_STAT 0 1 RUN Run enable status 1 r
201 CCU1_CLK_M4_TIMER0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
202 CCU1_CLK_M4_TIMER0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
203 CCU1_CLK_M4_TIMER1_CFG 0 1 RUN Run enable 1 rw
204 CCU1_CLK_M4_TIMER1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
205 CCU1_CLK_M4_TIMER1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
206 CCU1_CLK_M4_TIMER1_STAT 0 1 RUN Run enable status 1 r
207 CCU1_CLK_M4_TIMER1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
208 CCU1_CLK_M4_TIMER1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
209 CCU1_CLK_M4_SCU_CFG 0 1 RUN Run enable 1 rw
210 CCU1_CLK_M4_SCU_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
211 CCU1_CLK_M4_SCU_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
212 CCU1_CLK_M4_SCU_STAT 0 1 RUN Run enable status 1 r
213 CCU1_CLK_M4_SCU_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
214 CCU1_CLK_M4_SCU_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
215 CCU1_CLK_M4_CREG_CFG 0 1 RUN Run enable 1 rw
216 CCU1_CLK_M4_CREG_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
217 CCU1_CLK_M4_CREG_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
218 CCU1_CLK_M4_CREG_STAT 0 1 RUN Run enable status 1 r
219 CCU1_CLK_M4_CREG_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
220 CCU1_CLK_M4_CREG_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
221 CCU1_CLK_M4_RITIMER_CFG 0 1 RUN Run enable 1 rw
222 CCU1_CLK_M4_RITIMER_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
223 CCU1_CLK_M4_RITIMER_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
224 CCU1_CLK_M4_RITIMER_STAT 0 1 RUN Run enable status 1 r
225 CCU1_CLK_M4_RITIMER_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
226 CCU1_CLK_M4_RITIMER_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
227 CCU1_CLK_M4_USART2_CFG 0 1 RUN Run enable 1 rw
228 CCU1_CLK_M4_USART2_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
229 CCU1_CLK_M4_USART2_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
230 CCU1_CLK_M4_USART2_STAT 0 1 RUN Run enable status 1 r
231 CCU1_CLK_M4_USART2_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
232 CCU1_CLK_M4_USART2_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
233 CCU1_CLK_M4_USART3_CFG 0 1 RUN Run enable 1 rw
234 CCU1_CLK_M4_USART3_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
235 CCU1_CLK_M4_USART3_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
236 CCU1_CLK_M4_USART3_STAT 0 1 RUN Run enable status 1 r
237 CCU1_CLK_M4_USART3_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
238 CCU1_CLK_M4_USART3_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
239 CCU1_CLK_M4_TIMER2_CFG 0 1 RUN Run enable 1 rw
240 CCU1_CLK_M4_TIMER2_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
241 CCU1_CLK_M4_TIMER2_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
242 CCU1_CLK_M4_TIMER2_STAT 0 1 RUN Run enable status 1 r
243 CCU1_CLK_M4_TIMER2_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
244 CCU1_CLK_M4_TIMER2_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
245 CCU1_CLK_M4_TIMER3_CFG 0 1 RUN Run enable 1 rw
246 CCU1_CLK_M4_TIMER3_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
247 CCU1_CLK_M4_TIMER3_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
248 CCU1_CLK_M4_TIMER3_STAT 0 1 RUN Run enable status 1 r
249 CCU1_CLK_M4_TIMER3_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
250 CCU1_CLK_M4_TIMER3_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
251 CCU1_CLK_M4_SSP1_CFG 0 1 RUN Run enable 1 rw
252 CCU1_CLK_M4_SSP1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
253 CCU1_CLK_M4_SSP1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
254 CCU1_CLK_M4_SSP1_STAT 0 1 RUN Run enable status 1 r
255 CCU1_CLK_M4_SSP1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
256 CCU1_CLK_M4_SSP1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
257 CCU1_CLK_M4_QEI_CFG 0 1 RUN Run enable 1 rw
258 CCU1_CLK_M4_QEI_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
259 CCU1_CLK_M4_QEI_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
260 CCU1_CLK_M4_QEI_STAT 0 1 RUN Run enable status 1 r
261 CCU1_CLK_M4_QEI_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
262 CCU1_CLK_M4_QEI_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
263 CCU1_CLK_PERIPH_BUS_CFG 0 1 RUN Run enable 1 rw
264 CCU1_CLK_PERIPH_BUS_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
265 CCU1_CLK_PERIPH_BUS_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
266 CCU1_CLK_PERIPH_BUS_STAT 0 1 RUN Run enable status 1 r
267 CCU1_CLK_PERIPH_BUS_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
268 CCU1_CLK_PERIPH_BUS_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
269 CCU1_CLK_PERIPH_CORE_CFG 0 1 RUN Run enable 1 rw
270 CCU1_CLK_PERIPH_CORE_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
271 CCU1_CLK_PERIPH_CORE_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
272 CCU1_CLK_PERIPH_CORE_STAT 0 1 RUN Run enable status 1 r
273 CCU1_CLK_PERIPH_CORE_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
274 CCU1_CLK_PERIPH_CORE_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
275 CCU1_CLK_PERIPH_SGPIO_CFG 0 1 RUN Run enable 1 rw
276 CCU1_CLK_PERIPH_SGPIO_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
277 CCU1_CLK_PERIPH_SGPIO_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
278 CCU1_CLK_PERIPH_SGPIO_STAT 0 1 RUN Run enable status 1 r
279 CCU1_CLK_PERIPH_SGPIO_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
280 CCU1_CLK_PERIPH_SGPIO_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
281 CCU1_CLK_USB0_CFG 0 1 RUN Run enable 1 rw
282 CCU1_CLK_USB0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
283 CCU1_CLK_USB0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
284 CCU1_CLK_USB0_STAT 0 1 RUN Run enable status 1 r
285 CCU1_CLK_USB0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
286 CCU1_CLK_USB0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
287 CCU1_CLK_USB1_CFG 0 1 RUN Run enable 1 rw
288 CCU1_CLK_USB1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
289 CCU1_CLK_USB1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
290 CCU1_CLK_USB1_STAT 0 1 RUN Run enable status 1 r
291 CCU1_CLK_USB1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
292 CCU1_CLK_USB1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
293 CCU1_CLK_SPI_CFG 0 1 RUN Run enable 1 rw
294 CCU1_CLK_SPI_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
295 CCU1_CLK_SPI_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
296 CCU1_CLK_SPI_STAT 0 1 RUN Run enable status 1 r
297 CCU1_CLK_SPI_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
298 CCU1_CLK_SPI_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
299 CCU1_CLK_VADC_CFG 0 1 RUN Run enable 1 rw
300 CCU1_CLK_VADC_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
301 CCU1_CLK_VADC_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
302 CCU1_CLK_VADC_STAT 0 1 RUN Run enable status 1 r
303 CCU1_CLK_VADC_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
304 CCU1_CLK_VADC_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
305 CCU2_PM 0 1 PD Initiate power-down mode 0 rw
306 CCU2_BASE_STAT 1 1 BASE_UART3_CLK_IND Base clock indicator for BASE_UART3_CLK 1 r
307 CCU2_BASE_STAT 2 1 BASE_UART2_CLK_IND Base clock indicator for BASE_UART2_CLK 1 r
308 CCU2_BASE_STAT 3 1 BASE_UART1_CLK_IND Base clock indicator for BASE_UART1_CLK 1 r
309 CCU2_BASE_STAT 4 1 BASE_UART0_CLK_IND Base clock indicator for BASE_UART0_CLK 1 r
310 CCU2_BASE_STAT 5 1 BASE_SSP1_CLK_IND Base clock indicator for BASE_SSP1_CLK 1 r
311 CCU2_BASE_STAT 6 1 BASE_SSP0_CLK_IND Base clock indicator for BASE_SSP0_CLK 1 r
312 CCU2_CLK_APLL_CFG 0 1 RUN Run enable 1 rw
313 CCU2_CLK_APLL_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
314 CCU2_CLK_APLL_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
315 CCU2_CLK_APLL_STAT 0 1 RUN Run enable status 1 r
316 CCU2_CLK_APLL_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
317 CCU2_CLK_APLL_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
318 CCU2_CLK_APB2_USART3_CFG 0 1 RUN Run enable 1 rw
319 CCU2_CLK_APB2_USART3_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
320 CCU2_CLK_APB2_USART3_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
321 CCU2_CLK_APB2_USART3_STAT 0 1 RUN Run enable status 1 r
322 CCU2_CLK_APB2_USART3_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
323 CCU2_CLK_APB2_USART3_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
324 CCU2_CLK_APB2_USART2_CFG 0 1 RUN Run enable 1 rw
325 CCU2_CLK_APB2_USART2_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
326 CCU2_CLK_APB2_USART2_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
327 CCU2_CLK_APB2_USART2_STAT 0 1 RUN Run enable status 1 r
328 CCU2_CLK_APB2_USART2_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
329 CCU2_CLK_APB2_USART2_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
330 CCU2_CLK_APB0_UART1_CFG 0 1 RUN Run enable 1 rw
331 CCU2_CLK_APB0_UART1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
332 CCU2_CLK_APB0_UART1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
333 CCU2_CLK_APB0_UART1_STAT 0 1 RUN Run enable status 1 r
334 CCU2_CLK_APB0_UART1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
335 CCU2_CLK_APB0_UART1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
336 CCU2_CLK_APB0_USART0_CFG 0 1 RUN Run enable 1 rw
337 CCU2_CLK_APB0_USART0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
338 CCU2_CLK_APB0_USART0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
339 CCU2_CLK_APB0_USART0_STAT 0 1 RUN Run enable status 1 r
340 CCU2_CLK_APB0_USART0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
341 CCU2_CLK_APB0_USART0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
342 CCU2_CLK_APB2_SSP1_CFG 0 1 RUN Run enable 1 rw
343 CCU2_CLK_APB2_SSP1_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
344 CCU2_CLK_APB2_SSP1_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
345 CCU2_CLK_APB2_SSP1_STAT 0 1 RUN Run enable status 1 r
346 CCU2_CLK_APB2_SSP1_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
347 CCU2_CLK_APB2_SSP1_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
348 CCU2_CLK_APB0_SSP0_CFG 0 1 RUN Run enable 1 rw
349 CCU2_CLK_APB0_SSP0_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
350 CCU2_CLK_APB0_SSP0_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
351 CCU2_CLK_APB0_SSP0_STAT 0 1 RUN Run enable status 1 r
352 CCU2_CLK_APB0_SSP0_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
353 CCU2_CLK_APB0_SSP0_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r
354 CCU2_CLK_SDIO_CFG 0 1 RUN Run enable 1 rw
355 CCU2_CLK_SDIO_CFG 1 1 AUTO Auto (AHB disable mechanism) enable 0 rw
356 CCU2_CLK_SDIO_CFG 2 1 WAKEUP Wake-up mechanism enable 0 rw
357 CCU2_CLK_SDIO_STAT 0 1 RUN Run enable status 1 r
358 CCU2_CLK_SDIO_STAT 1 1 AUTO Auto (AHB disable mechanism) enable status 0 r
359 CCU2_CLK_SDIO_STAT 2 1 WAKEUP Wake-up mechanism enable status 0 r