Use a specific symbol for data source address in flash

That way, data source address does not depend on any other unrelated change in
linker script.

This also fixes cases when .data input section is aligned on 8 bytes.  The new
version does not provide any address for the output section so that it is
aligned to the strictest input section.  The _data_loadaddr symbol will
always take this alignment into account.
This commit is contained in:
Nicolas Schodet 2012-09-03 19:49:47 +02:00
parent 2a35377980
commit 74cd991e7e
14 changed files with 30 additions and 19 deletions

View File

@ -45,6 +45,7 @@ SECTIONS
. = ALIGN(4);
_edata = .;
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -20,7 +20,7 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s): */
extern unsigned _etext, _data, _edata, _ebss, _stack;
extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
void main(void);
void reset_handler(void);
@ -61,9 +61,10 @@ void (*const vector_table[]) (void) = {
void reset_handler(void)
{
volatile unsigned *src, *dest;
__asm__("MSR msp, %0" : : "r"(&_stack));
for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++)
for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
while (dest < &_ebss)

View File

@ -45,6 +45,7 @@ SECTIONS
. = ALIGN(4);
_edata = .;
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -45,6 +45,7 @@ SECTIONS
. = ALIGN(4);
_edata = .;
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -19,8 +19,8 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s). */
extern unsigned _etext, _data, _edata, _ebss, _stack;
/* Symbols exported by the linker script(s): */
extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
void main(void);
void reset_handler(void);
@ -60,9 +60,10 @@ void (*const vector_table[]) (void) = {
void reset_handler(void)
{
volatile unsigned *src, *dest;
__asm__("MSR msp, %0" : : "r"(&_stack));
for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++)
for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
while (dest < &_ebss)

View File

@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(4);
_edata = .;
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(4);
_edata = .;
} >ram_data AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -20,8 +20,8 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s). */
extern unsigned _etext, _data, _edata, _ebss, _stack;
/* Symbols exported by the linker script(s): */
extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
extern unsigned _etext_ram, _text_ram, _etext_rom;
void main(void);
@ -165,6 +165,7 @@ void (*const vector_table[]) (void) = {
void reset_handler(void)
{
volatile unsigned *src, *dest;
__asm__("MSR msp, %0" : : "r"(&_stack));
/* Copy the code from ROM to Real RAM (if enabled) */
@ -185,7 +186,7 @@ void reset_handler(void)
/* Continue Execution in RAM */
}
for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++)
for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
while (dest < &_ebss)

View File

@ -52,12 +52,13 @@ SECTIONS
__exidx_end = .;
} >rom
.data : AT (__exidx_end) {
.data : {
_data = .;
*(.data*) /* Read-write initialized data */
. = ALIGN(4);
_edata = .;
} >ram
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -19,8 +19,8 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s). */
extern unsigned __exidx_end, _data, _edata, _ebss, _stack;
/* Symbols exported by the linker script(s): */
extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
void main(void);
void reset_handler(void);
@ -197,7 +197,7 @@ void reset_handler(void)
__asm__("MSR msp, %0" : : "r"(&_stack));
for (src = &__exidx_end, dest = &_data; dest < &_edata; src++, dest++)
for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
while (dest < &_ebss)

View File

@ -52,12 +52,13 @@ SECTIONS
__exidx_end = .;
} >rom
.data : AT (__exidx_end) {
.data : {
_data = .;
*(.data*) /* Read-write initialized data */
. = ALIGN(4);
_edata = .;
} >ram
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -21,7 +21,7 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s): */
extern unsigned __exidx_end, _data, _edata, _ebss, _stack;
extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
void main(void);
void reset_handler(void);
@ -224,7 +224,7 @@ void reset_handler(void)
__asm__("MSR msp, %0" : : "r"(&_stack));
for (src = &__exidx_end, dest = &_data; dest < &_edata; src++, dest++)
for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
while (dest < &_ebss)

View File

@ -55,6 +55,7 @@ SECTIONS
. = ALIGN(4);
_edata = .;
} >ram AT >rom
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*) /* Read-write zero initialized data */

View File

@ -21,7 +21,7 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s): */
extern unsigned _etext, _data, _edata, _ebss, _stack;
extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
void main(void);
void reset_handler(void);
@ -224,7 +224,7 @@ void reset_handler(void)
__asm__("MSR msp, %0" : : "r"(&_stack));
for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++)
for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
while (dest < &_ebss)