Add more RCC related API functions and their prototypes.
This includes: - rcc_set_sysclk_source() - rcc_set_pll_multiplication_factor() - rcc_set_pll_source() - rcc_set_pllxtpre()
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@ -378,5 +378,9 @@ void rcc_osc_bypass_enable(osc_t osc);
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void rcc_osc_bypass_disable(osc_t osc);
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void rcc_osc_bypass_disable(osc_t osc);
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void rcc_enable_peripheral_clock(volatile u32 *reg, u32 peripheral_en);
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void rcc_enable_peripheral_clock(volatile u32 *reg, u32 peripheral_en);
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void rcc_disable_peripheral_clock(volatile u32 *reg, u32 peripheral_en);
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void rcc_disable_peripheral_clock(volatile u32 *reg, u32 peripheral_en);
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void rcc_set_sysclk_source(u32 clk);
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void rcc_set_pll_multiplication_factor(u32 mul);
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void rcc_set_pll_source(u32 pllsrc);
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void rcc_set_pllxtpre(u32 pllxtpre);
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#endif
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#endif
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35
lib/rcc.c
35
lib/rcc.c
@ -234,3 +234,38 @@ void rcc_disable_peripheral_clock(volatile u32 *reg, u32 peripheral_en)
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*reg &= ~peripheral_en;
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*reg &= ~peripheral_en;
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}
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}
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void rcc_set_sysclk_source(u32 clk)
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{
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u32 reg32;
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reg32 = RCC_CFGR;
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reg32 &= ~((1 << 1) | (1 << 0));
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RCC_CFGR = (reg32 | clk);
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}
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void rcc_set_pll_multiplication_factor(u32 mul)
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{
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u32 reg32;
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reg32 = RCC_CFGR;
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reg32 &= ~((1 << 21) | (1 << 20) | (1 << 19) | (1 << 18));
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RCC_CFGR = (reg32 | (mul << 18));
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}
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void rcc_set_pll_source(u32 pllsrc)
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{
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u32 reg32;
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reg32 = RCC_CFGR;
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reg32 &= ~(1 << 16);
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RCC_CFGR = (reg32 | (pllsrc << 16));
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}
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void rcc_set_pllxtpre(u32 pllxtpre)
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{
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u32 reg32;
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reg32 = RCC_CFGR;
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reg32 &= ~(1 << 17);
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RCC_CFGR = (reg32 | (pllxtpre << 17));
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}
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