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Cosmetic fixes.

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This commit is contained in:
Uwe Hermann 2010-03-06 15:22:09 +01:00
parent e6c72d5cfc
commit a6342d4968
6 changed files with 27 additions and 22 deletions
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2
examples/mb525/fancyblink/fancyblink.c
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@ -2,7 +2,7 @@
* This file is part of the libopenstm32 project. * This file is part of the libopenstm32 project.
* *
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>, * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>,
* 2010 Piotr Esden-Tempski <piotr@esden.net> * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
include/libopenstm32/gpio.h
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@ -152,7 +152,6 @@
#define GPIO_ETH_RXD2 GPIO0 /* PB0 */ #define GPIO_ETH_RXD2 GPIO0 /* PB0 */
#define GPIO_ETH_RXD3 GPIO1 /* PB1 */ #define GPIO_ETH_RXD3 GPIO1 /* PB1 */
/* --- GPIO registers ------------------------------------------------------ */ /* --- GPIO registers ------------------------------------------------------ */
/* Port configuration register low (GPIOx_CRL) */ /* Port configuration register low (GPIOx_CRL) */

2
include/libopenstm32/nvic.h
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@ -24,6 +24,7 @@
#include <libopenstm32/common.h> #include <libopenstm32/common.h>
/* --- NVIC Registers ------------------------------------------------------ */ /* --- NVIC Registers ------------------------------------------------------ */
/* ISER: Interrupt Set Enable Registers */ /* ISER: Interrupt Set Enable Registers */
/* Note: 8 32bit Registers */ /* Note: 8 32bit Registers */
#define NVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + (iser_id * 4)) #define NVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + (iser_id * 4))
@ -107,6 +108,7 @@
#define SCB_AFSR MMIO32(SCB_BASE + 0x3C) #define SCB_AFSR MMIO32(SCB_BASE + 0x3C)
/* --- NVIC functions ------------------------------------------------------ */ /* --- NVIC functions ------------------------------------------------------ */
void nvic_enable_irq(s32 irqn); void nvic_enable_irq(s32 irqn);
void nvic_disable_irq(s32 irqn); void nvic_disable_irq(s32 irqn);
s32 nvic_get_pending_irq(s32 irqn); s32 nvic_get_pending_irq(s32 irqn);

42
include/libopenstm32/tools.h
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@ -20,20 +20,24 @@
#ifndef LIBOPENSTM32_TOOLS_H #ifndef LIBOPENSTM32_TOOLS_H
#define LIBOPENSTM32_TOOLS_H #define LIBOPENSTM32_TOOLS_H
/****************************************************************************** /*
* Register accessors / manipulators * Register accessors / manipulators
******************************************************************************/ */
/* Get register content */ /* Get register content. */
#define GET_REG(REG) ((u16) *REG) #define GET_REG(REG) ((u16) *REG)
/* Set register content */
/* Set register content. */
#define SET_REG(REG, VAL) (*REG = (u16)VAL) #define SET_REG(REG, VAL) (*REG = (u16)VAL)
/* Clear register bit */
/* Clear register bit. */
#define CLR_REG_BIT(REG, BIT) SET_REG(REG, (~BIT)) #define CLR_REG_BIT(REG, BIT) SET_REG(REG, (~BIT))
/* Clear register bit masking out some bits that must not be touched */
#define CLR_REG_BIT_MSK(REG, MSK, BIT) SET_REG(REG, (GET_REG(REG) & \ /* Clear register bit masking out some bits that must not be touched. */
MSK & (~BIT))) #define CLR_REG_BIT_MSK(REG, MSK, BIT) \
/* Get masked out bit value */ SET_REG(REG, (GET_REG(REG) & MSK & (~BIT)))
/* Get masked out bit value. */
#define GET_REG_BIT(REG, BIT) (GET_REG(REG) & BIT) #define GET_REG_BIT(REG, BIT) (GET_REG(REG) & BIT)
/* /*
@ -44,15 +48,17 @@
* bitmask BIT then we write 1 and if the bit in the masked window is * bitmask BIT then we write 1 and if the bit in the masked window is
* matching the bitmask BIT we write 0. * matching the bitmask BIT we write 0.
* *
* TODO: we may need a faster implementation of that one? * TODO: We may need a faster implementation of that one?
*/ */
#define TOG_SET_REG_BIT_MSK(REG, MSK, BIT) { \ #define TOG_SET_REG_BIT_MSK(REG, MSK, BIT) \
register u16 toggle_mask = GET_REG(REG) & MSK; \ { \
register u16 bit_selector; \ register u16 toggle_mask = GET_REG(REG) & MSK; \
for(bit_selector = 1; bit_selector; bit_selector <<= 1){ \ register u16 bit_selector; \
if((bit_selector & BIT) != 0) toggle_mask ^= bit_selector; \ for (bit_selector = 1; bit_selector; bit_selector <<= 1) { \
} \ if ((bit_selector & BIT) != 0) \
SET_REG(REG, toggle_mask); \ toggle_mask ^= bit_selector; \
} } \
SET_REG(REG, toggle_mask); \
}
#endif #endif

1
lib/rtc.c
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@ -75,4 +75,3 @@ void rtc_disable_alarm(void)
RTC_CRH &= ~RTC_CRH_ALRIE; RTC_CRH &= ~RTC_CRH_ALRIE;
rtc_exit_config_mode(); rtc_exit_config_mode();
} }

1
lib/usart.c
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@ -98,4 +98,3 @@ u16 usart_recv(u32 usart)
/* Receive data. */ /* Receive data. */
return USART_DR(usart) & 0x1ff; return USART_DR(usart) & 0x1ff;
} }