swm050: simplify doxygen

We don't need groupings around each enum, they format nicely into a
section already.  Likewise, the doxygen _is_ documentation, so we don't
need extra versions of it in places. Also fix a few warnings generated.
This commit is contained in:
Karl Palsson 2020-01-28 21:50:00 +00:00
parent f06a1ca958
commit a6aecf8ccd
2 changed files with 29 additions and 66 deletions

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@ -30,126 +30,75 @@
#include <libopencm3/cm3/common.h> #include <libopencm3/cm3/common.h>
#include <libopencm3/swm050/memorymap.h> #include <libopencm3/swm050/memorymap.h>
/* Timer select */
/** @defgroup timer_select Timer Select /** @defgroup timer_select Timer Select
@{*/ @{*/
#define TIMER_SE0 TIMER_SE0_BASE #define TIMER_SE0 TIMER_SE0_BASE
#define TIMER_SE1 TIMER_SE1_BASE #define TIMER_SE1 TIMER_SE1_BASE
/*@}*/ /*@}*/
/* Timer level definitions */ /** Timer Level */
/** @defgroup timer_level Timer Level
@{*/
enum timer_level { enum timer_level {
TIMER_LEVEL_LOW, TIMER_LEVEL_LOW,
TIMER_LEVEL_HIGH TIMER_LEVEL_HIGH
}; };
/*@}*/
/* Timer edge mode definitions */ /** Timer Edge Modes */
/** @defgroup timer_edge_modes Timer Edge Modes
@{*/
enum timer_edge_modes { enum timer_edge_modes {
/* Trigger on rising edge */ /** Trigger on rising edge */
TIMER_EDGE_RISING, TIMER_EDGE_RISING,
/* Trigger on falling edge */ /** Trigger on falling edge */
TIMER_EDGE_FALLING TIMER_EDGE_FALLING
}; };
/*@}*/
/* Timer operation mode definitions */ /** Timer Operation Modes */
/** @defgroup timer_operation_modes Timer Operation Modes
@{*/
enum timer_operation_modes { enum timer_operation_modes {
TIMER_MODE_COUNTER, TIMER_MODE_COUNTER,
TIMER_MODE_PWM, TIMER_MODE_PWM,
TIMER_MODE_PULSE_CAPTURE, TIMER_MODE_PULSE_CAPTURE,
TIMER_MODE_DUTY_CYCLE_CAPTURE TIMER_MODE_DUTY_CYCLE_CAPTURE
}; };
/*@}*/
/* Timer clock source definitions */ /** Timer Clock Source */
/** @defgroup timer_clk_src Timer Clock Source
@{*/
enum timer_clk_src { enum timer_clk_src {
TIMER_CLK_INTERNAL, TIMER_CLK_INTERNAL,
TIMER_CLK_EXTERNAL TIMER_CLK_EXTERNAL
}; };
/*@}*/
/* Timer interrupt mask definitions */ /** Timer Interrupt Mask */
/** @defgroup timer_int_masked Timer Interrupt Mask
@{*/
enum timer_int_masked { enum timer_int_masked {
TIMER_UNMASKED, TIMER_UNMASKED,
TIMER_MASKED TIMER_MASKED
}; };
/*@}*/
/* Timer loop mode definitions */ /** Timer Loop Modes */
/** @defgroup timer_loop_modes Timer Loop Modes
@{*/
enum timer_loop_modes { enum timer_loop_modes {
TIMER_LOOP_MODE, TIMER_LOOP_MODE,
TIMER_SINGLE_MODE TIMER_SINGLE_MODE
}; };
/*@}*/
/* Timer output mode definitions */ /** Timer Output Modes */
/** @defgroup timer_output_modes Timer Output Modes
@{*/
enum timer_output_modes { enum timer_output_modes {
TIMER_OUTPUT_NONE, TIMER_OUTPUT_NONE,
TIMER_OUTPUT_INVERT, TIMER_OUTPUT_INVERT,
TIMER_OUTPUT_HIGH, TIMER_OUTPUT_HIGH,
TIMER_OUTPUT_LOW TIMER_OUTPUT_LOW
}; };
/*@}*/
/* Timer PWM period definitions */ /** Timer PWM Periods */
/** @defgroup timer_pwm_period Timer PWM Periods
@{*/
enum timer_pwm_period { enum timer_pwm_period {
TIMER_PERIOD_0, TIMER_PERIOD_0,
TIMER_PERIOD_1 TIMER_PERIOD_1
}; };
/*@}*/
/* Timer clock divider mask */ /** Timer Clock Divider Mask */
/** @defgroup timer_div_mask Timer Clock Divider Mask
@{*/
#define TIMER_DIV_MASK (0x3F << 16) #define TIMER_DIV_MASK (0x3F << 16)
/*@}*/
/* Timer operation mode mask */ /** Timer Operation Mode Mask */
/** @defgroup timer_operation_mask Timer Operation Mode Mask
@{*/
#define TIMER_OPER_MODE_MASK (0x3 << 4) #define TIMER_OPER_MODE_MASK (0x3 << 4)
/*@}*/
/* Timer output mode mask */ /** Timer Output Mode Mask */
/** @defgroup timer_output_mask Timer Output Mode Mask
@{*/
#define TIMER_OUTP_MODE_MASK (0x3 << 12) #define TIMER_OUTP_MODE_MASK (0x3 << 12)
/*@}*/
/* Timer subregisters */
/** @defgroup timer_subregisters Timer Subregisters
@{*/
#define TIMER_CTRL_EN 1
/** Clock source selection */
#define TIMER_CTRL_OSCMOD (1 << 8)
/** Valid edge selection */
#define TIMER_CTRL_TMOD (1 << 16)
/** Loop mode selection */
#define TIMER_CTRL_LMOD (1 << 28)
/** Interrupt mask */
#define TIMER_INTCTL_INTMSK (1 << 1)
/** Interrupt enable */
#define TIMER_INTCTL_INTEN 1
/*@}*/
/* Timer registers */
/** @defgroup timer_registers Timer Registers /** @defgroup timer_registers Timer Registers
@{*/ @{*/
/** Timer control register */ /** Timer control register */
@ -177,6 +126,21 @@ enum timer_pwm_period {
#define TIMER_INTFLAG(x) MMIO32(x + 0x90) #define TIMER_INTFLAG(x) MMIO32(x + 0x90)
/*@}*/ /*@}*/
/** @defgroup timer_reg_values Timer Register Values
@{*/
#define TIMER_CTRL_EN 1
/** Clock source selection */
#define TIMER_CTRL_OSCMOD (1 << 8)
/** Valid edge selection */
#define TIMER_CTRL_TMOD (1 << 16)
/** Loop mode selection */
#define TIMER_CTRL_LMOD (1 << 28)
/** Interrupt mask */
#define TIMER_INTCTL_INTMSK (1 << 1)
/** Interrupt enable */
#define TIMER_INTCTL_INTEN 1
/*@}*/
BEGIN_DECLS BEGIN_DECLS
void timer_counter_setup(uint32_t timer, void timer_counter_setup(uint32_t timer,

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@ -78,6 +78,7 @@ static void timer_setup_internal(uint32_t timer,
* @param clk_src Passed to @ref timer_clock_source() * @param clk_src Passed to @ref timer_clock_source()
* @param output_mode Passed to @ref timer_output_mode() * @param output_mode Passed to @ref timer_output_mode()
* @param output_level Passed to @ref timer_output_level() * @param output_level Passed to @ref timer_output_level()
* @param target Passed to @ref timer_counter_target_value()
*/ */
void timer_counter_setup(uint32_t timer, void timer_counter_setup(uint32_t timer,
bool timer_int_en, bool timer_int_en,
@ -104,9 +105,7 @@ void timer_counter_setup(uint32_t timer,
* @param timer Select timer @ref timer_select * @param timer Select timer @ref timer_select
* @param timer_int_en Passed to @ref timer_int_enable() * @param timer_int_en Passed to @ref timer_int_enable()
* @param edge_mode Passed to @ref timer_edge_mode() * @param edge_mode Passed to @ref timer_edge_mode()
* @param loop_mode Passed to @ref timer_loop_mode()
* @param clk_src Passed to @ref timer_clock_source() * @param clk_src Passed to @ref timer_clock_source()
* @param output_mode Passed to @ref timer_output_mode()
* @param output_level Passed to @ref timer_output_level() * @param output_level Passed to @ref timer_output_level()
* @param period0 Passed to @ref timer_pwm_target_value() * @param period0 Passed to @ref timer_pwm_target_value()
* @param period1 Passed to @ref timer_pwm_target_value() * @param period1 Passed to @ref timer_pwm_target_value()