stm32: rework spi, based on PR #740 and #742.

split spi stuff in three part:
 - v1 : basic spi peripheral
 - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
 - v2 : spi with variable datasize, fifo and other fancy stuff.

v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4

This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.

include/libopencm3/stm32/common/spi_common_all.h

@@ -345,8 +345,6 @@ specific memorymap.h header before including this header file.*/
 BEGIN_DECLS
 
 void spi_reset(uint32_t spi_peripheral);
-int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
-		    uint32_t dff, uint32_t lsbfirst);
 void spi_enable(uint32_t spi);
 void spi_disable(uint32_t spi);
 uint16_t spi_clean_disable(uint32_t spi);
@@ -362,8 +360,6 @@ void spi_enable_crc(uint32_t spi);
 void spi_disable_crc(uint32_t spi);
 void spi_set_next_tx_from_buffer(uint32_t spi);
 void spi_set_next_tx_from_crc(uint32_t spi);
-void spi_set_dff_8bit(uint32_t spi);
-void spi_set_dff_16bit(uint32_t spi);
 void spi_set_full_duplex_mode(uint32_t spi);
 void spi_set_receive_only_mode(uint32_t spi);
 void spi_disable_software_slave_management(uint32_t spi);

include/libopencm3/stm32/common/spi_common_v1.h

@@ -29,18 +29,12 @@ specific memorymap.h header before including this header file.*/
 /** @cond */
 #ifdef LIBOPENCM3_SPI_H
 /** @endcond */
-#ifndef LIBOPENCM3_SPI_COMMON_L1F124_H
+#pragma once
-#define LIBOPENCM3_SPI_COMMON_L1F124_H
 
 /**@{*/
 
 #include <libopencm3/stm32/common/spi_common_all.h>
 
-/*
- * This file extends the common STM32 version with definitions only
- * applicable to the STM32L1/F1/2/4 series of devices.
- */
-
 /* DFF: Data frame format */
 /****************************************************************************/
 /** @defgroup spi_dff SPI data frame format
@@ -48,17 +42,27 @@ specific memorymap.h header before including this header file.*/
 
 @{*/
 
-#define SPI_CR1_DFF_8BIT        (0 << 11)
+#define SPI_CR1_DFF_8BIT			(0 << 11)
-#define SPI_CR1_DFF_16BIT       (1 << 11)
+#define SPI_CR1_DFF_16BIT			(1 << 11)
 
 /**@}*/
 
-#define SPI_CR1_DFF         (1 << 11)
+#define SPI_CR1_DFF					(1 << 11)
+
+/* --- Function prototypes ------------------------------------------------- */
+
+BEGIN_DECLS
+
+int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
+		uint32_t dff, uint32_t lsbfirst);
+void spi_set_dff_8bit(uint32_t spi);
+void spi_set_dff_16bit(uint32_t spi);
+
+END_DECLS
 
-#endif
 /** @cond */
 #else
-#warning "spi_common_l1f124.h should not be included explicitly, only via spi.h"
+#warning "spi_common_v1.h should not be included explicitly, only via spi.h"
 #endif
 /** @endcond */
 /**@}*/

include/libopencm3/stm32/common/spi_common_v1_frf.h

@@ -29,37 +29,38 @@ specific memorymap.h header before including this header file.*/
 /** @cond */
 #ifdef LIBOPENCM3_SPI_H
 /** @endcond */
-#ifndef LIBOPENCM3_SPI_COMMON_F24_H
+#pragma once
-#define LIBOPENCM3_SPI_COMMON_F24_H
 
 /**@{*/
 
-#include <libopencm3/stm32/common/spi_common_l1f124.h>
+#include <libopencm3/stm32/common/spi_common_v1.h>
-
-/*
- * This file extends the common STM32 version with definitions only
- * applicable to the STM32F2/4 series of devices.
- */
-
-/* Note, these values are also on the F0, but other parts are _not_ */
 
 /* --- SPI_CR2 values ------------------------------------------------------ */
 
 /* FRF: Frame format */
 /* Note: Not used in I2S mode. */
-#define SPI_CR2_FRF			(1 << 4)
+#define SPI_CR2_FRF				(1 << 4)
 #define SPI_CR2_FRF_MOTOROLA_MODE	(0 << 4)
 #define SPI_CR2_FRF_TI_MODE		(1 << 4)
 
 /* --- SPI_SR values ------------------------------------------------------- */
 
-/* TIFRFE: TI frame format error */
+/* FRE / TIFRFE: TI frame format error */
-#define SPI_SR_TIFRFE			(1 << 8)
+#define SPI_SR_TIFRFE			(1 << 8) //F2
+#define SPI_SR_FRE				(1 << 8) //others
+
+/* --- Function prototypes ------------------------------------------------- */
+
+BEGIN_DECLS
+
+void spi_set_frf_ti(uint32_t spi);
+void spi_set_frf_motorola(uint32_t spi);
+
+END_DECLS
 
-#endif
 /** @cond */
 #else
-#warning "spi_common_f24.h should not be included explicitly, only via spi.h"
+#warning "spi_common_v1_frf.h should not be included explicitly, only via spi.h"
 #endif
 /** @endcond */
 /**@}*/

include/libopencm3/stm32/common/spi_common_v2.h

@@ -19,32 +19,26 @@
  */
 
 /* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA SPI.H
- * The order of header inclusion is important. spi.h includes the device
+The order of header inclusion is important. spi.h includes the device
- * specific memorymap.h header before including this header file.*/
+specific memorymap.h header before including this header file.*/
 
 /** @cond */
 #ifdef LIBOPENCM3_SPI_H
 /** @endcond */
-#ifndef LIBOPENCM3_SPI_COMMON_F03_H
+#pragma once
-#define LIBOPENCM3_SPI_COMMON_F03_H
 
 /**@{*/
 
 #include <libopencm3/stm32/common/spi_common_all.h>
 
-/*
- * This file extends the common stm32 version with defintions only
- * applicable to the STM32F0/F3 series of devices
- */
-
 #define SPI_DR8(spi_base)	MMIO8((spi_base) + 0x0c)
 #define SPI1_DR8		SPI_DR8(SPI1_BASE)
 #define SPI2_DR8		SPI_DR8(SPI2_BASE)
 #define SPI3_DR8		SPI_DR8(SPI3_BASE)
 
-/* DFF: Data frame format */
+/* CRCL: CRC Length */
 /****************************************************************************/
-/** @defgroup spi_dff SPI data frame format
+/** @defgroup spi_crcl SPI crc length
  * @ingroup spi_defines
  *
  * @{*/
@@ -65,8 +59,12 @@
 /* FRXTH: FIFO reception threshold */
 #define SPI_CR2_FRXTH			(1 << 12)
 
-/* DS [3:0]: Data size */
+/* DS: Data size */
-/* 0x0 - 0x2 NOT USED */
+/****************************************************************************/
+/** @defgroup spi_ds SPI data size
+ * @ingroup spi_defines
+ *
+ * @{*/
 #define SPI_CR2_DS_4BIT			(0x3 << 8)
 #define SPI_CR2_DS_5BIT			(0x4 << 8)
 #define SPI_CR2_DS_6BIT			(0x5 << 8)
@@ -80,6 +78,7 @@
 #define SPI_CR2_DS_14BIT		(0xD << 8)
 #define SPI_CR2_DS_15BIT		(0xE << 8)
 #define SPI_CR2_DS_16BIT		(0xF << 8)
+/**@}*/
 #define SPI_CR2_DS_MASK			(0xF << 8)
 
 /* NSSP: NSS pulse management */
@@ -102,7 +101,8 @@
 /* --- Function prototypes ------------------------------------------------- */
 
 BEGIN_DECLS
-
+int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha, 
+		uint32_t lsbfirst);
 void spi_set_crcl_8bit(uint32_t spi);
 void spi_set_crcl_16bit(uint32_t spi);
 void spi_set_data_size(uint32_t spi, uint16_t data_s);
@@ -114,10 +114,9 @@ uint8_t spi_read8(uint32_t spi);
 
 END_DECLS
 
-#endif
 /** @cond */
 #else
-#warning "spi_common_f03.h should not be included explicitly, only via spi.h"
+#warning "spi_common_v2.h should not be included explicitly, only via spi.h"
 #endif
 /** @endcond */
 /**@}*/

include/libopencm3/stm32/f0/spi.h

@@ -31,6 +31,6 @@
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_f03.h>
+#include <libopencm3/stm32/common/spi_common_v2.h>
 
 #endif

include/libopencm3/stm32/f1/spi.h

@@ -31,7 +31,7 @@ LGPL License Terms @ref lgpl_license
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_l1f124.h>
+#include <libopencm3/stm32/common/spi_common_v1.h>
 
 #endif
 

include/libopencm3/stm32/f2/spi.h

@@ -31,7 +31,7 @@ LGPL License Terms @ref lgpl_license
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_f24.h>
+#include <libopencm3/stm32/common/spi_common_v1_frf.h>
 
 #endif
 

include/libopencm3/stm32/f3/spi.h

@@ -31,6 +31,6 @@
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_f03.h>
+#include <libopencm3/stm32/common/spi_common_v2.h>
 
 #endif

include/libopencm3/stm32/f4/spi.h

@@ -31,7 +31,7 @@ LGPL License Terms @ref lgpl_license
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_f24.h>
+#include <libopencm3/stm32/common/spi_common_v1_frf.h>
 
 #endif
 

include/libopencm3/stm32/l0/spi.h

@@ -0,0 +1,37 @@
+/** @defgroup spi_defines SPI Defines
+
+@brief <b>Defined Constants and Types for the STM32L0xx SPI</b>
+
+@ingroup STM32L0xx_defines
+
+@version 1.0.0
+
+@date 20 January 2017
+
+LGPL License Terms @ref lgpl_license
+ */
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_SPI_H
+#define LIBOPENCM3_SPI_H
+
+#include <libopencm3/stm32/common/spi_common_v1_frf.h>
+
+#endif
+

include/libopencm3/stm32/l1/spi.h

@@ -31,7 +31,7 @@ LGPL License Terms @ref lgpl_license
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_l1f124.h>
+#include <libopencm3/stm32/common/spi_common_v1_frf.h>
 
 #endif
 

include/libopencm3/stm32/l4/spi.h

@@ -31,6 +31,6 @@
 #ifndef LIBOPENCM3_SPI_H
 #define LIBOPENCM3_SPI_H
 
-#include <libopencm3/stm32/common/spi_common_f03.h>
+#include <libopencm3/stm32/common/spi_common_v2.h>
 
 #endif

include/libopencm3/stm32/spi.h

@@ -30,6 +30,8 @@
 #       include <libopencm3/stm32/f3/spi.h>
 #elif defined(STM32F4)
 #       include <libopencm3/stm32/f4/spi.h>
+#elif defined(STM32L0)
+#       include <libopencm3/stm32/l0/spi.h>
 #elif defined(STM32L1)
 #       include <libopencm3/stm32/l1/spi.h>
 #elif defined(STM32L4)

lib/stm32/common/spi_common_v1.c

@@ -1,3 +1,4 @@
+
 /** @addtogroup spi_file
 
 @author @htmlonly © @endhtmlonly 2009
@@ -53,6 +54,7 @@ LSB first.
 #include <libopencm3/stm32/spi.h>
 #include <libopencm3/stm32/rcc.h>
 
+
 /**@{*/
 
 /*---------------------------------------------------------------------------*/
@@ -96,7 +98,7 @@ int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
 	SPI_CR2(spi) |= SPI_CR2_SSOE; /* common case */
 	SPI_CR1(spi) = reg32;
 
-	return 0; /* TODO */
+	return 0;
 }
 
 /*---------------------------------------------------------------------------*/

lib/stm32/common/spi_common_v1_frf.c

@@ -0,0 +1,67 @@
+/** @addtogroup spi_file
+
+@author @htmlonly © @endhtmlonly 2009
+Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2012
+Ken Sarkies <ksarkies@internode.on.net>
+@author @htmlonly &copy; @endhtmlonly 2018
+Guillaume Revaillot <revaillot@archos.com>
+
+*/
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/spi.h>
+
+/**@{*/
+
+/*---------------------------------------------------------------------------*/
+/** @brief SPI Set Frame Format to TI
+
+@param[in] spi Unsigned int32. SPI peripheral identifier @ref spi_reg_base.
+*/
+
+void spi_set_frf_ti(uint32_t spi)
+{
+	SPI_CR2(spi) |= SPI_CR2_FRF;
+}
+
+/*---------------------------------------------------------------------------*/
+/** @brief SPI Set Frame Format to Motorola
+
+@param[in] spi Unsigned int32. SPI peripheral identifier @ref spi_reg_base.
+*/
+
+void spi_set_frf_motorola(uint32_t spi)
+{
+	SPI_CR2(spi) &= ~SPI_CR2_FRF;
+}
+
+#define SPI_CR2_FRF			(1 << 4)
+#define SPI_CR2_FRF_MOTOROLA_MODE	(0 << 4)
+#define SPI_CR2_FRF_TI_MODE		(1 << 4)
+
+/* --- SPI_SR values ------------------------------------------------------- */
+
+/* FRE / TIFRFE: TI frame format error */
+#define SPI_SR_TIFRFE			(1 << 8) //F2
+#define SPI_SR_FRE			(1 << 8) //others
+
+/**@}*/

lib/stm32/common/spi_common_v2.c

@@ -59,36 +59,32 @@ LSB first.
 /** @brief Configure the SPI as Master.
 
 The SPI peripheral is configured as a master with communication parameters
-baudrate, crc length 8/16 bits, frame format lsb/msb first, clock polarity
+baudrate, frame format lsb/msb first, clock polarity and phase. The SPI 
-and phase. The SPI enable, CRC enable and CRC next controls are not affected.
+enable, CRC enable, CRC next CRC length controls are not affected.
 These must be controlled separately.
 
-@todo NSS pin handling.
-
 @param[in] spi Unsigned int32. SPI peripheral identifier @ref spi_reg_base.
 @param[in] br Unsigned int32. Baudrate @ref spi_baudrate.
 @param[in] cpol Unsigned int32. Clock polarity @ref spi_cpol.
 @param[in] cpha Unsigned int32. Clock Phase @ref spi_cpha.
-@param[in] crcl Unsigned int32. CRC length 8/16 bits @ref spi_crcl.
 @param[in] lsbfirst Unsigned int32. Frame format lsb/msb first @ref
 spi_lsbfirst.
 @returns int. Error code.
 */
 
 int spi_init_master(uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha,
-		    uint32_t crcl, uint32_t lsbfirst)
+		    uint32_t lsbfirst)
 {
 	uint32_t reg32 = SPI_CR1(spi);
 
-	/* Reset all bits omitting SPE, CRCEN and CRCNEXT bits. */
+	/* Reset all bits omitting SPE, CRCEN, CRCNEXT and CRCL bits. */
-	reg32 &= SPI_CR1_SPE | SPI_CR1_CRCEN | SPI_CR1_CRCNEXT;
+	reg32 &= SPI_CR1_SPE | SPI_CR1_CRCEN | SPI_CR1_CRCNEXT | SPI_CR1_CRCL;
 
 	reg32 |= SPI_CR1_MSTR;	/* Configure SPI as master. */
 
 	reg32 |= br;		/* Set baud rate bits. */
 	reg32 |= cpol;		/* Set CPOL value. */
 	reg32 |= cpha;		/* Set CPHA value. */
-	reg32 |= crcl;		/* Set crc length (8 or 16 bits). */
 	reg32 |= lsbfirst;	/* Set frame format (LSB- or MSB-first). */
 
 	/* TODO: NSS pin handling. */
@@ -103,7 +99,6 @@ void spi_send8(uint32_t spi, uint8_t data)
 	/* Wait for transfer finished. */
 	while (!(SPI_SR(spi) & SPI_SR_TXE));
 
-	/* Write data (8 or 16 bits, depending on DFF) into DR. */
 	SPI_DR8(spi) = data;
 }
 
@@ -112,7 +107,6 @@ uint8_t spi_read8(uint32_t spi)
 	/* Wait for transfer finished. */
 	while (!(SPI_SR(spi) & SPI_SR_RXNE));
 
-	/* Read the data (8 or 16 bits, depending on DFF bit) from DR. */
 	return SPI_DR8(spi);
 }
 
@@ -138,26 +132,38 @@ void spi_set_crcl_16bit(uint32_t spi)
 	SPI_CR1(spi) |= SPI_CR1_CRCL;
 }
 
+/** @brief SPI Set data size
+
+@param[in] spi Unsigned int32. SPI peripheral identifier @ref spi_reg_base.
+@param[in] data_s Unsigned int16. data size @ref spi_ds.
+*/
+
 void spi_set_data_size(uint32_t spi, uint16_t data_s)
 {
 	SPI_CR2(spi) = (SPI_CR2(spi) & ~SPI_CR2_DS_MASK) |
 		       (data_s & SPI_CR2_DS_MASK);
 }
 
+/*---------------------------------------------------------------------------*/
+/** @brief SPI Set reception threshold to 8 bits
+
+@param[in] spi Unsigned int32. SPI peripheral identifier @ref spi_reg_base.
+*/
+
 void spi_fifo_reception_threshold_8bit(uint32_t spi)
 {
 	SPI_CR2(spi) |= SPI_CR2_FRXTH;
 }
 
+/*---------------------------------------------------------------------------*/
+/** @brief SPI Set reception threshold to 16 bits
+
+@param[in] spi Unsigned int32. SPI peripheral identifier @ref spi_reg_base.
+*/
+
 void spi_fifo_reception_threshold_16bit(uint32_t spi)
 {
 	SPI_CR2(spi) &= ~SPI_CR2_FRXTH;
 }
 
-void spi_i2s_mode_spi_mode(uint32_t spi)
-{
-	SPI_I2SCFGR(spi) &= ~SPI_I2SCFGR_I2SMOD;
-}
-
-
 /**@}*/

lib/stm32/f0/Makefile

@@ -41,13 +41,15 @@ OBJS		= can.o flash.o rcc.o usart.o dma.o rtc.o comparator.o crc.o \
 
 OBJS            += gpio_common_all.o gpio_common_f0234.o crc_common_all.o crc_v2.o \
                    pwr_common_v1.o iwdg_common_all.o rtc_common_l1f024.o \
-                   dma_common_l1f013.o exti_common_all.o spi_common_all.o \
+                   dma_common_l1f013.o exti_common_all.o \
-		   spi_common_f03.o flash_common_f01.o dac_common_all.o \
+                   flash_common_f01.o dac_common_all.o \
-		   timer_common_all.o timer_common_f0234.o rcc_common_all.o
+                   timer_common_all.o timer_common_f0234.o rcc_common_all.o
+
 OBJS		+= adc_common_v2.o
 OBJS		+= crs_common_all.o
 OBJS		+= usart_common_all.o usart_common_v2.o
 OBJS		+= i2c_common_v2.o
+OBJS		+= spi_common_all.o spi_common_v2.o
 
 OBJS		+= usb.o usb_control.o usb_standard.o
 OBJS		+= st_usbfs_core.o st_usbfs_v2.o

lib/stm32/f1/Makefile

@@ -42,10 +42,11 @@ OBJS		+= mac.o mac_stm32fxx7.o phy.o phy_ksz80x1.o
 
 OBJS            += crc_common_all.o dac_common_all.o dma_common_l1f013.o \
                    gpio_common_all.o i2c_common_v1.o iwdg_common_all.o \
-                   pwr_common_v1.o spi_common_all.o spi_common_l1f124.o \
+                   pwr_common_v1.o \
                    timer_common_all.o usart_common_all.o usart_common_f124.o \
                    rcc_common_all.o exti_common_all.o \
                    flash_common_f01.o
+OBJS		+= spi_common_all.o spi_common_v1.o
 
 OBJS            += usb.o usb_control.o usb_standard.o usb_msc.o
 OBJS		+= usb_dwc_common.o usb_f107.o

lib/stm32/f2/Makefile

@@ -40,12 +40,13 @@ OBJS		= gpio.o rcc.o desig.o
 
 OBJS            += crc_common_all.o dac_common_all.o dma_common_f24.o \
                    gpio_common_all.o gpio_common_f0234.o i2c_common_v1.o \
-                   iwdg_common_all.o rtc_common_l1f024.o spi_common_all.o \
+                   iwdg_common_all.o rtc_common_l1f024.o \
-                   spi_common_l1f124.o timer_common_all.o timer_common_f0234.o \
+                   timer_common_all.o timer_common_f0234.o \
 		   timer_common_f24.o usart_common_all.o usart_common_f124.o \
 		   flash_common_f234.o flash_common_f24.o hash_common_f24.o \
 		   crypto_common_f24.o exti_common_all.o rcc_common_all.o
 OBJS		+= rng_common_v1.o
+OBJS            += spi_common_all.o spi_common_v1.o spi_common_v1_frf.o
 
 OBJS            += usb.o usb_standard.o usb_control.o usb_dwc_common.o \
                    usb_f107.o usb_f207.o usb_msc.o

lib/stm32/f3/Makefile

@@ -41,12 +41,13 @@ OBJS		= rcc.o adc.o can.o pwr.o usart.o dma.o flash.o desig.o
 
 OBJS            += gpio_common_all.o gpio_common_f0234.o \
 		   dac_common_all.o crc_common_all.o crc_v2.o \
-		   iwdg_common_all.o pwr_common_v1.o spi_common_all.o dma_common_l1f013.o\
+		   iwdg_common_all.o pwr_common_v1.o dma_common_l1f013.o\
 		   timer_common_all.o timer_common_f0234.o flash_common_f234.o \
-		   flash.o exti_common_all.o rcc_common_all.o spi_common_f03.o
+		   flash.o exti_common_all.o rcc_common_all.o
 OBJS		+= adc_common_v2.o adc_common_v2_multi.o
 OBJS		+= usart_common_v2.o usart_common_all.o
 OBJS		+= i2c_common_v2.o
+OBJS		+= spi_common_all.o spi_common_v2.o
 
 OBJS		+= usb.o usb_control.o usb_standard.o
 OBJS		+= st_usbfs_core.o st_usbfs_v1.o

lib/stm32/f4/Makefile

@@ -45,12 +45,13 @@ OBJS		= adc.o adc_common_v1.o can.o desig.o gpio.o pwr.o rcc.o \
 OBJS            += crc_common_all.o dac_common_all.o dma_common_f24.o \
                    gpio_common_all.o gpio_common_f0234.o i2c_common_v1.o \
                    iwdg_common_all.o pwr_common_v1.o rtc_common_l1f024.o \
-                   spi_common_all.o spi_common_l1f124.o timer_common_all.o \
+                   timer_common_all.o \
                    timer_common_f0234.o timer_common_f24.o usart_common_all.o \
 		   usart_common_f124.o flash_common_f234.o flash_common_f24.o \
 		   hash_common_f24.o crypto_common_f24.o exti_common_all.o \
 		   rcc_common_all.o
 OBJS		+= rng_common_v1.o
+OBJS		+= spi_common_all.o spi_common_v1.o spi_common_v1_frf.o
 
 OBJS            += usb.o usb_standard.o usb_control.o usb_dwc_common.o \
 		   usb_f107.o usb_f207.o usb_msc.o

lib/stm32/l0/Makefile

@@ -39,6 +39,7 @@ ARFLAGS		= rcs
 OBJS		= gpio.o rcc.o desig.o
 OBJS		+= pwr_common_v1.o pwr_common_v2.o
 OBJS		+= timer_common_all.o
+OBJS		+= spi_common_all.o spi_common_v1.o spi_common_v1_frf.o
 
 OBJS            += gpio_common_all.o gpio_common_f0234.o rcc_common_all.o
 OBJS		+= adc_common_v2.o

lib/stm32/l1/Makefile

@@ -42,7 +42,8 @@ OBJS		+= flash_common_l01.o
 OBJS		+= gpio_common_all.o gpio_common_f0234.o
 OBJS		+= i2c_common_v1.o iwdg_common_all.o
 OBJS		+= pwr_common_v1.o pwr_common_v2.o rtc_common_l1f024.o
-OBJS		+= spi_common_all.o spi_common_l1f124.o timer_common_all.o
+OBJS		+= spi_common_all.o spi_common_v1.o spi_common_v1_frf.o
+OBJS		+= timer_common_all.o
 OBJS		+= usart_common_all.o usart_common_f124.o
 OBJS		+= exti_common_all.o
 OBJS		+= rcc_common_all.o

lib/stm32/l4/Makefile

@@ -54,7 +54,7 @@ OBJS            += usart_common_all.o usart_common_v2.o
 OBJS            += dma_common_l1f013.o
 OBJS            += iwdg_common_all.o
 OBJS            += rtc_common_l1f024.o
-OBJS            += spi_common_all.o spi_common_f03.o
+OBJS            += spi_common_all.o spi_common_v2.o
 
 OBJS            += usb.o usb_control.o usb_standard.o
 OBJS            += st_usbfs_core.o st_usbfs_v2.o