stm32: adc: group adc_registers
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@ -35,6 +35,8 @@ specific memorymap.h header before including this header file.*/
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#ifndef LIBOPENCM3_ADC_COMMON_V2_H
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#ifndef LIBOPENCM3_ADC_COMMON_V2_H
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#define LIBOPENCM3_ADC_COMMON_V2_H
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#define LIBOPENCM3_ADC_COMMON_V2_H
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/** @defgroup adc_registers ADC registers
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@{*/
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/* ----- ADC registers -----------------------------------------------------*/
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/* ----- ADC registers -----------------------------------------------------*/
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/** ADC interrupt and status register */
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/** ADC interrupt and status register */
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#define ADC_ISR(adc) MMIO32((adc) + 0x00)
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#define ADC_ISR(adc) MMIO32((adc) + 0x00)
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@ -56,6 +58,7 @@ specific memorymap.h header before including this header file.*/
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/** Common Configuration register */
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/** Common Configuration register */
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#define ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8)
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#define ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8)
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/**@}*/
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/* --- Register values -------------------------------------------------------*/
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/* --- Register values -------------------------------------------------------*/
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@ -42,6 +42,8 @@ specific memorymap.h header before including this header file.*/
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* or only a much "simpler" version as found on (so far) f0 and l0.
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* or only a much "simpler" version as found on (so far) f0 and l0.
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*/
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*/
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/** @addtogroup adc_registers
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*@{*/
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/* ----- ADC registers -----------------------------------------------------*/
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/* ----- ADC registers -----------------------------------------------------*/
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/* Sample Time Register 2 */
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/* Sample Time Register 2 */
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#define ADC_SMPR2(adc) MMIO32((adc) + 0x18)
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#define ADC_SMPR2(adc) MMIO32((adc) + 0x18)
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@ -84,6 +86,7 @@ specific memorymap.h header before including this header file.*/
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/* ADC common (shared) registers */
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/* ADC common (shared) registers */
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#define ADC_CSR(adc) MMIO32((adc) + 0x300 + 0x0)
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#define ADC_CSR(adc) MMIO32((adc) + 0x300 + 0x0)
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#define ADC_CDR(adc) MMIO32((adc) + 0x300 + 0xc)
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#define ADC_CDR(adc) MMIO32((adc) + 0x300 + 0xc)
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/**@}*/
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/* --- Register values ------------------------------------------------------*/
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/* --- Register values ------------------------------------------------------*/
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/* ADC_ISR Values -----------------------------------------------------------*/
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/* ADC_ISR Values -----------------------------------------------------------*/
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@ -42,9 +42,12 @@ specific memorymap.h header before including this header file.*/
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#ifndef LIBOPENCM3_ADC_COMMON_V2_SINGLE_H
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#ifndef LIBOPENCM3_ADC_COMMON_V2_SINGLE_H
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#define LIBOPENCM3_ADC_COMMON_V2_SINGLE_H
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#define LIBOPENCM3_ADC_COMMON_V2_SINGLE_H
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/** @addtogroup adc_registers
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*@{*/
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/* ----- ADC registers -----------------------------------------------------*/
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/* ----- ADC registers -----------------------------------------------------*/
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/** Channel Select Register */
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/** Channel Select Register */
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#define ADC_CHSELR(adc) MMIO32((adc) + 0x28)
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#define ADC_CHSELR(adc) MMIO32((adc) + 0x28)
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/**@}*/
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/* ----- ADC registers values -----------------------------------------------*/
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/* ----- ADC registers values -----------------------------------------------*/
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/* ADC_CFGR1 values */
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/* ADC_CFGR1 values */
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@ -47,6 +47,8 @@
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#define ADC_CHANNEL_VBAT 14
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#define ADC_CHANNEL_VBAT 14
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/**@}*/
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/**@}*/
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/** @addtogroup adc_registers
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*@{*/
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/* ----- ADC registers -----------------------------------------------------*/
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/* ----- ADC registers -----------------------------------------------------*/
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/** ADC_AWD1TR Watchdog 1 Threshold register */
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/** ADC_AWD1TR Watchdog 1 Threshold register */
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#define ADC_AWD1TR(adc) MMIO32((adc) + 0x20)
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#define ADC_AWD1TR(adc) MMIO32((adc) + 0x20)
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@ -65,6 +67,7 @@
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/** ADC_OR Option register */
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/** ADC_OR Option register */
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#define ADC_OR(adc) MMIO32((adc) + 0xD0)
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#define ADC_OR(adc) MMIO32((adc) + 0xD0)
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/**@}*/
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/* --- Register values -------------------------------------------------------*/
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/* --- Register values -------------------------------------------------------*/
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