The enum definitions are specified in the form
31:5 register offset from SYSCTL_BASE for the clock register
4:0 bit offset for the given peripheral
The names have the form [clock_type]_[periph_type]_[periph_number]
Where clock_type is
RCC for run clock
SCC for sleep clock
DCC for deep-sleep clock
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Create lm4f code infrastructure from the lm3s infrastructure.
As far as the interrupt table is concerned, don't create an irq.yaml. Just
include the LM3S nvic.h. The LM3S vector table seems to be compatible with the
LM4F
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
